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Q. Two balanced, wye-connected, three-phase loads are in parallel across a balanced, three - phase 60- Hz, 208-Vsupply. The first load takes 12 kWat 0.6 power factor lagging, and the second load takes 15 kVA at 0.8 power factor lagging.
(a) Draw the power triangle for each load and for the combination.
(b) What is the total kVA supplied?
(c) Find the supply power factor, and specify whether lagging or leading.
(d) Compute the magnitude of the current drawn by each load and drawn from the supply.
(e) If wye-connected capacitors are placed in parallel with the two loads in order to improve the supply power factor, determine the value of capacitance in farads in each phase needed to bring the overall power factor to unity.
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Q. Determine the current I through the 10- resistor of the circuit of Figure by employing the node-voltage method. Check by mesh analysis.
D Flip Flop As we have seen in the SR flip flop when the inputs S= R are applied the forbidden or indeterminate state occurs. This state can destabilize the SR file flop.
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