Draw the circuit diagram of a Master-Slave J-K flip-flop, Computer Engineering

Assignment Help:

Draw the circuit diagram of a Master-slave J-K flip-flop using NAND gates. What is race around condition? How is it eliminated in a Master-slave J-K flip-flop?

Ans.

Using NAND Gates logic Diagram of Master-Slave J-K Flip-Flop:  Fig.(a) demonstrates the logic diagram of Master-Slave J-K Flip-Flop by using NAND gates.

1795_Draw the circuit diagram of a Master-slave J-K flip-flop.png

Fig.7(a) Logic Diagram of Master-Slave J-K FLIP-FLOP

The Race-around Condition: The difficulty of both inputs 1that means S = R = I being not permitted in an S-R Flip-Flop is removed in a J-K Flip-Flop through using the feedback connection from outputs to the inputs of the gates. There is into R-S Flip-Flop, the inputs do not change throughout the clock pulse (CK = 1), that is not true in J-K Flip-Flop due to the feedback connections. Notice that the inputs are J = K = 1 and Q = 0 and a pulse as demonstrated in Fig.(b) is applied to the clock input. After some time interval ?t equal to the propagation delay throughout two NAND gates in series, the output will be to Q = 1.

Now we contain J = K = 1 and Q = 1 and after other time interval of ?t the output will be back to Q = O. Therefore, for the duration tp of the clock pulse, the output will oscillate back and forth among 0 and 1. At the ending of the clock pulse, the value of Q is indefinite. This situation is termed to as the race-around conditions. So the race-around condition can be ignored if tp < ?t < T. Though, this may be not easy to satisfy this inequality due to very small propagation delays in ICs. A further practical method of overcoming such difficulty is the utilization of the master-slave (M-S) configuration.

223_Draw the circuit diagram of a Master-slave J-K flip-flop1.png

Fig. (b) a Clock Pulse

A master-slave J-K Flip-Flop is a cascade of two S-R Flip-Flops along with feedback from the outputs of the second to the inputs to the first as exemplified in Fig.(a). Positive (+ CLK) clock pulses are applied to the first Flip-Flop and the clock pulses are inverted before such are applied to the second Flip-Flop. While CK=1, the first Flip-Flop is enabled and the outputs QM and Q‾M act in response to inputs of theses i.e. J and K as per the Table. Now, the second Flip-Flop is inhibited since its clock is LOW (539_a Clock Pulse.png= 0). While CK goes LOW (539_a Clock Pulse.png= 1), the first Flip-Flop is reserved and the second Flip-Flop is enabled, since now its clock is HIGH (539_a Clock Pulse.png= 1). Thus, the outputs Q and Q‾ follow the outputs QM and Q‾M respectively as in second and third rows of Table. Because the second Flip-Flop simply follows the first one, it is referred to as the Slave and the first one as the Master. Therefore, this configuration is termed to as Master-Slave Flip-Flop. In such circuit, the inputs to the gates G3M and G4M don't change throughout the clock pulse; therefore the Race-around condition does not be present. The state of the Master-Slave Flip-Flop changes on the negative transition (trailing ending).

373_Truth Table of JK Master-Slave Flip-Flop.png

Table 7.1 Truth Table of JK Master-Slave Flip-Flop

 


Related Discussions:- Draw the circuit diagram of a Master-Slave J-K flip-flop

Explain parameter passing in procedures, Q. Explain Parameter Passing in Pr...

Q. Explain Parameter Passing in Procedures? Parameter passing is a very vital concept in assembly language. It makes assembly procedures more general. Parameter can be passed t

What are the advantages of using structure in c program, What are the advan...

What are the advantages of using structure in C Program Declaring a struct is a two-stage process. The first stage defines a new data type that has the required structure which

Difference between the testing and verification, Difference between the tes...

Difference between the testing and verification. Verification proves conformance with a specification. Testing tries to find cases where the system does not meet its specifi

Explain characteristics of prototyping, Question: (a) List five main c...

Question: (a) List five main characteristics of ‘Prototyping'. (b) Describe briefly why ‘Prototyping' is essential to Rapid Application Development. (c) Describe the 2 t

Java program , Q.--> The program simulates a student management system havi...

Q.--> The program simulates a student management system having thE following:The interface uses command buttons to (i) add,edit,delete,update and cancel the records, (ii) to naviga

How to create user interfaces for lists, How to create user interfaces for ...

How to create user interfaces for lists? The R/3 system automatically, obtains a graphical user interface (GUI) for your lists that offers the basic functions for list process

Determine the hardware for multiplication, Determine the hardware for multi...

Determine the hardware for multiplication The hardware for multiplication consists of equipment given in Figure. The multiplier is stored in register and its sign in Q . The se

Illustrate role of world wide web in field of e-commerce, Illustrate the ro...

Illustrate the role of World Wide Web into the field of e-commerce. In the 1990 year, the advent of the World Wide Web upon the Internet represented a turning point into e-com

Instruction level-parallelism based on granularity size, Instruction level ...

Instruction level This is the initial level and the degree of parallelism is uppermost at this level. The fine grain size is used at statement or instruction level as only few

What types of data entry services do you perform, What types of data entry ...

What types of data entry services do you perform? Our business is to understand what data you require entered and in what particular format. After an initial analysis is perfor

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd