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DMA controllers in computer system:
INTERFACE CIRCUITS
o Provides a storage buffer for at least one word of data.
o Circuitry required connecting an I/O device to a computer bus
o Contains address-decoding circuitry
o Contains status flag that can be accessed by the processor.
o Generates the appropriate timing signals required by the bus control scheme.
o Performs format conversions
o Ports
o Parallel port
o Serial port
Keyboard to processor connection
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zmax=7.5x1-3x2 subject to constraints 3x1-x2-x3>=3 x1-x2+x3>=2 x1,x2,x3>=0
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