Displacement addressing mode - computer architecture, Computer Engineering

Assignment Help:

Displacement and Stack Addressing mode - computer architecture:

Displacement Addressing:

In displacement addressing mode there are three types of addressing mode. They are following:

  I.          Base register addressing

  II.         Indexing addressing.

  III.        Relative addressing

This is a grouping of register indirect addressing and direct addressing. The value contained in 1 address field. Directly A is used and the other address refers to a register whose contents are added to A to generate the effective address.

Stack Addressing:

Stack is a linear array of locations which referred to as last-in first out queue. The stack is a booked block of location, deleted and appended only at the top of the stack. Stack pointer is a register which hold the address of top of stack location. This mode of addressing is also called as implicit addressing.

 

 

 


Related Discussions:- Displacement addressing mode - computer architecture

Differentiate between rom test and the ram test, Probelm : a) What is t...

Probelm : a) What is the purpose of "Jumps" in the 8051 Microcontroller? Describe three types of "Jumps". b) What is the purpose of a "call"? c) Differentiate between ROM

Static memories - computer architecture, Static memories Circuits c...

Static memories Circuits capable of receiving their state as long as power is applied volatile Static RAM(SRAM)

Describe about managing data tasks?, Data can be handled by using the featu...

Data can be handled by using the features of Import text wizard and export text wizard. Here you can keep the operation for future use. First you should edit the specification name

Determine the basic machine language instructions, Determine the basic Mach...

Determine the basic Machine language instructions Machine language instructions and data are in terms of 0s and 1s and are stored in the memory. It isn't possible to distinguis

Explain a TTL NAND gate and its operation, Give the circuit of a TTL NAND g...

Give the circuit of a TTL NAND gate and explain its operation in brief. Ans: Operation of TTL NAND Gate: Fig.(d) Demonstrates a TTL NAND gate with a totem pole output.

Illustrate the cache memory operation, Q. Illustrate the Cache Memory Opera...

Q. Illustrate the Cache Memory Operation? It comprises a copy of a part of main memory contents. When a program is running and CPU tries to read a word of memory (instruction o

Illustrate the table of types of serach engines, Illustrate the table of ty...

Illustrate the table of types of serach engines Type in: CIE and the search engine would return about 22 million hits Type in

What is full form of bdc session, What is full form of BDC Session? Bat...

What is full form of BDC Session? Batch Data Communication Session.

What do you mean by segment numbers, Q. What do you mean by Segment numbers...

Q. What do you mean by Segment numbers? There is a good reason for not leaving determination of segment numbers up to assembler. It permits programs written in 8086 assembly

Describe about remote-load latency problem, Q. Describe about Remote-load L...

Q. Describe about Remote-load Latency Problem? When one processor requires some remote loading of data from other nodes then processor has to wait for these two remote load ope

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd