Different models of computation-parallel algorithms, Computer Networking

Assignment Help:

There are various computational models for representing the parallel computers. In this part, we discuss various models. These models would give a platform for the designing as well as the analysis of the parallel algorithms.

Combinational Circuits

Combinational Circuit is one of the forms for parallel computers. In interconnection networks, many processors communicate with each other directly and do not need a shared memory in between. Mostly, combinational circuit (cc) is a connected arrangement of logic gates with a set of m input lines and a set of n output lines as given in Figure. The combinational circuits are mostly made up of various interconnected components arranged in the form called as stages as given in Figure.

587_Combinational circuit.png

                                                                          Combinational circuit

2413_Detailed combinational circuit.png

Detailed combinational circuit

It might be noted here that there is no feedback control employed in combinational circuits. There are a small number of terminologies followed in the context of combinational circuits such as fan in and fan out. Fan in indicates the number of input lines attached to each device and fan out indicates the number of output lines. In Figure , the fan in is 3 and fan out is also 3. The following parameters are used for analyzing a combinational circuit:

1)  Depth: It means that the total number of phases used in the combinational circuit starting from the input lines to the output lines. For example, in the depth are 4, as there are four different phases attached to a interconnection network. The other form of interpretation of depth can be that it represents the worst case time complexity of resolving a problem as input is given at the initial input lines and data is transmitted between various phases through the interconnection network and at the end reaches the output lines.

2) Width: It represents the total number of devices attached for a particular phase. For example in Figure, there are 4 components linked to the interconnection network. It means that the width is 4.

3)  Size: It represents the total count of devices used in the complete combinational circuit. For example, in Figure , the size of combinational circuit is 16 i.e. (width * depth).


Related Discussions:- Different models of computation-parallel algorithms

State sonet frame, SONET Frame Can be viewed as a matrix of nine rows ...

SONET Frame Can be viewed as a matrix of nine rows of 90 octets every for a total of 810 octets.  A few used for control they aren't positioned at the beginning or end of the

Configuration and cable termination, how can I establish a home net work by...

how can I establish a home net work by using cables and wieless

Netware protocol provides link-state routing, Which NetWare protocol provid...

Which NetWare protocol provides link-state routing? Ans) NetWare Link Services Protocol (NLSP) gives link-state routing. SAP (Service Advertisement Protocol) advertises network

What does the spanning tree algorithm (sta) do, IEEE 8021.d Spanning Tree P...

IEEE 8021.d Spanning Tree Protocol (STP) was developed to stop routing loops in a network. If a router, switch, or hub has more than one path to the similar destination, a routing

Explain the uses of firewall in computer, Explain the uses of Firewall in c...

Explain the uses of Firewall in computer For Intranet developers, restricting access of unauthorised users to the Web site has been the greatest challenge. In addition to preve

Torus, Torus The mesh network with enclose around connections is called...

Torus The mesh network with enclose around connections is called Tours Network.

Resolution of domain name system, Q. Resolution of domain name system? ...

Q. Resolution of domain name system? - Mapping a name to an address or else an address to a name - Resolver is a DNS client used by an address to provide mapping - In re

Layers, Layers, Massages, Segments, Datagram's and Frames Figure 2.15 ...

Layers, Massages, Segments, Datagram's and Frames Figure 2.15 show the physical  path data takes down a  sending  end  systems  protocol  stack up and  down the  protocol stac

Types of redundancy checks, Types of Redundancy Checks Parity Check ...

Types of Redundancy Checks Parity Check Simple Parity Check Two Dimensional Parity Check / Longitudinal Redundancy Check (LRC) CRC (Cyclic Redundancy Check)

elementary logic gate circuit, Question Which elementary logic gate is...

Question Which elementary logic gate is equivalent to this circuit? Show your working.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd