Determine the example - fork-join, Computer Engineering

Assignment Help:

Determine the Example - "fork-join"

module initial_fork_join();

reg clk,reset,enable,data;

initial begin

$monitor("‰g clk=‰b reset=‰b enable=‰b data=‰b",

$time, clk, reset, enable, data);

fork

#1 clk = 0;

#10 reset = 0;

#5 enable = 0;

#3 data = 0;

join

#1 $display ("‰g Terminating simulation", $time);

$finish;

end

endmodule

 


Related Discussions:- Determine the example - fork-join

What is ''preemption'' program, Program 'preemption' is? Ans. Forced de...

Program 'preemption' is? Ans. Forced de allocation of the CPU from a program that is executing on the CPU is called preemption program.

Determine the advantages of bcd adder, Determine the advantages of BCD Adde...

Determine the advantages of BCD Adder Now let us see the arithmetic addition of two decimal digits in the BCD, with a possible carry from previous stage. As each input digit do

SGML, Write short note of SGML

Write short note of SGML

4 bit comparator, how to breadboARD THE 4 BIT COMPARATOR

how to breadboARD THE 4 BIT COMPARATOR

How physical addressing is performed in wan, How physical addressing is per...

How physical addressing is performed in WAN?  WAN networks operate as similar to a LAN. All WAN technology describes the specific frame format a computer uses while sending an

Greedy search - artificial intelligence, Greedy Search - artificial intelli...

Greedy Search - artificial intelligence: If we have a heuristic function for states, defined as above, so we can simply measure each state with respect to this measure and ord

Determine sky wave communication is prone to fading or not, Sky wave Commun...

Sky wave Communication is prone to fading, it is true or false. Ans: It is true that sky wave Communication is prone to fading.

Array, list advantages of array

list advantages of array

Explain in detail about register transfer language, We have multiple instan...

We have multiple instances in RTL (Register Transfer Language), do you do anything special during synthesis stage? Whereas writing RTL(Register Transfer language),say in Verilo

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd