Design combinational-sequential electronic logic gate, Computer Engineering

Assignment Help:

Combinational/Sequential Logic design with Integrated Circuits (Dual in line package)

Car wash concept with the following steps in a Combinational Logic Diagram:

1.    Start Rinse   

2.    Stop Rinse, Start Soap

3.    Start Brush

4.    Stop Soap, Stop Brush

5.    Start rinse

6.    Stop rinse, Start Dry

7.    Stop Dry

A corresponding LED will light-up when the step is reached on during the car wash sequence/run.  Each LED will be on for 5 seconds.  For steps 2, 4, and 6, those LEDs will light for 8 seconds.

Requirements:  Design Combinational/sequential electronic logic diagram with integrated Circuit items depicted an automated Car Wash process.  All of the integrated circuits used thus far in the course have been 74LS00s and 74000s series.

From the diagram I will actually construct the project on a Pencil Box Logic Designer which has an experimental breadboard. Items used in/on the diagram will include some of the following ICs that can be placed on breadboard:

Logic Gates:

AND gate

Exclusive-OR (XOR) gate

Inverter gate

NAND gate

NOR gate

OR gate

TIMER

Half-Adder

Full-Adder

Comparators

Binary Decoders

Binary-to-Decimal Decoders

Multiplexer (MUX)

Demultiplexer (DEMUX)

Latch

S-R Latch

Gated S-R Latch

D Latch

FLIP-FLOPS

D flip-flop

J-K flip-flop

One shot

Counters & Counter logic operations

Shift Registers

Serial In/Serial Out

Serial In/Parallel Out

Note: Some of the items on the list are combinations of several ICs.  Example: Instead of using XOR gate for logic functions on the diagrams, it can also be a combination of 2 x Inverter Gates, 2 x AND Gates, & 1 x OR Gate.

The PencilBox Logic Designer which I'm using has Logic Indicators (8 x LED), CLOCK, Logic 8 x Switches, 2 x PULSERS push buttons.

The last diagram I completed was a 4-Bit Counter.  See below:

492_4 bit binary counter.png


Related Discussions:- Design combinational-sequential electronic logic gate

Explain icw, Question 1 What are the drivers behind the convergence betwee...

Question 1 What are the drivers behind the convergence between voice and data networks? Explain them briefly Question 2 Explain the need and functioning of Private ST Netw

Complexity of sequential search, Specified the average case complexity of s...

Specified the average case complexity of sequential search in an array of unsorted elements of size n if the following conditions hold: a)  Probability of the key to be in the a

Role of bitmap indexes to solve aggregation problems, Describe about the ro...

Describe about the role of bitmap indexes to solve aggregation problems? Ans) Bitmaps are very useful in begin schema to join large databases to small databases. Answer queries

Explain combinational logic circuits, Explain Combinational logic circuits ...

Explain Combinational logic circuits Ans. Combinational logic circuits:- (i) Outputs only depend upon present state of the input. (ii) No memory element present or no f

Determine the simplified sop boolean expression, The Karnaugh map for a SOP...

The Karnaugh map for a SOP function is given below in figure. Determine the simplified SOP Boolean expression. Ans. F= B'C' + A'C'D + B'D'

Realize the basic gates with any one universal gate, What is a universal ga...

What is a universal gate? Give examples. Realize the basic gates with any one universal gate. Ans: Universal Gates:   NAND and NOR are termed as Universal gates. The OR, AN

List the major components of the keyboard, List the major components of the...

List the major components of the keyboard/Display interface. a. Keyboard section b. CPU interface section c. Display section d. Scan section

Determine bhca rating for processor and call completion rate, A call proces...

A call processor in an exchange requires 120 ms to service a complete call. What is the BHCA rating for the processor? If the exchange is capable of carrying 700 Erlangs of traffic

State the concept of hierarchy in object oriented, Hierarchy Hierarchy...

Hierarchy Hierarchy is a process of ranking or ordering of abstraction. Hierarchy is decided by the help of 'divide and conquer' principle. Complex objects can be described

What is task identifier, Q. What is task identifier? Each and every PVM...

Q. What is task identifier? Each and every PVM task is uniquely recognized by an integer known as task identifier (TID) assigned by local pvmd. Messages are received from and s

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd