Design combinational-sequential electronic logic gate, Computer Engineering

Assignment Help:

Combinational/Sequential Logic design with Integrated Circuits (Dual in line package)

Car wash concept with the following steps in a Combinational Logic Diagram:

1.    Start Rinse   

2.    Stop Rinse, Start Soap

3.    Start Brush

4.    Stop Soap, Stop Brush

5.    Start rinse

6.    Stop rinse, Start Dry

7.    Stop Dry

A corresponding LED will light-up when the step is reached on during the car wash sequence/run.  Each LED will be on for 5 seconds.  For steps 2, 4, and 6, those LEDs will light for 8 seconds.

Requirements:  Design Combinational/sequential electronic logic diagram with integrated Circuit items depicted an automated Car Wash process.  All of the integrated circuits used thus far in the course have been 74LS00s and 74000s series.

From the diagram I will actually construct the project on a Pencil Box Logic Designer which has an experimental breadboard. Items used in/on the diagram will include some of the following ICs that can be placed on breadboard:

Logic Gates:

AND gate

Exclusive-OR (XOR) gate

Inverter gate

NAND gate

NOR gate

OR gate

TIMER

Half-Adder

Full-Adder

Comparators

Binary Decoders

Binary-to-Decimal Decoders

Multiplexer (MUX)

Demultiplexer (DEMUX)

Latch

S-R Latch

Gated S-R Latch

D Latch

FLIP-FLOPS

D flip-flop

J-K flip-flop

One shot

Counters & Counter logic operations

Shift Registers

Serial In/Serial Out

Serial In/Parallel Out

Note: Some of the items on the list are combinations of several ICs.  Example: Instead of using XOR gate for logic functions on the diagrams, it can also be a combination of 2 x Inverter Gates, 2 x AND Gates, & 1 x OR Gate.

The PencilBox Logic Designer which I'm using has Logic Indicators (8 x LED), CLOCK, Logic 8 x Switches, 2 x PULSERS push buttons.

The last diagram I completed was a 4-Bit Counter.  See below:

492_4 bit binary counter.png


Related Discussions:- Design combinational-sequential electronic logic gate

Explain a TTL NAND gate and its operation, Give the circuit of a TTL NAND g...

Give the circuit of a TTL NAND gate and explain its operation in brief. Ans: Operation of TTL NAND Gate: Fig.(d) Demonstrates a TTL NAND gate with a totem pole output.

Explain processing of an interrupt, Q. Explain Processing of an Interrupt? ...

Q. Explain Processing of an Interrupt? The interrupt is processed as: Step 1: Number field in INT instruction is multiplied by 4 to get its entry in interrupt vector table.

C Programming, Program about railway reservation system using structure . G...

Program about railway reservation system using structure . Get 10 names,their gender ,address , seats availability according to trains and some extra datas

Reduce minimum literals and derive their complements, Q. Reduce following t...

Q. Reduce following to minimum literals and derive their complements. 1. [(AB)'A][(AB)'B] 2. ABC(ABC' + AB'C + A'BC) 3. (A+C+D) (A+C+D') (A+C'+D)(A+D')

Program size for different instruction set approaches, Q. Program size for ...

Q. Program size for different Instruction Set Approaches? Assumptions: Complex Instruction is: Add C, A, B having 16 bit addresses and 8 bit data operands All opera

Describe buffer of receiving process, Q. Describe buffer of receiving proce...

Q. Describe buffer of receiving process? MPI_Gather (Sendaddr, Scount, Sdatatype, Receiveaddr, Rcount, Rdatatype,Rank, Comm): 'Using this function process with rank' rank

Backpropagation, Backpropagation: However Backpropagation can be seen ...

Backpropagation: However Backpropagation can be seen as utilising searching a space of network configurations as weights in order to find a configuration with the least error,

Additions of two numbers by using 2’s complement, Add -20 to +26 by using 2...

Add -20 to +26 by using 2's complement ? Ans. Firstly convert the both numbers 20 and 26 in its 8-bit binary equivalent and determine the 2's complement of 20, after that add -

What are the different scheduling policies in linux, What are the different...

What are the different scheduling policies in Linux The Linux scheduler has three different scheduling policies: one for 'normal'Processes, and two for 'real time' processes

Designing the instruction format, Q. Designing the instruction format is a ...

Q. Designing the instruction format is a complex art? Instruction Length Significance: It's the fundamental issue of the format design. It concludes the richness and flex

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd