Design combinational-sequential electronic logic gate, Computer Engineering

Assignment Help:

Combinational/Sequential Logic design with Integrated Circuits (Dual in line package)

Car wash concept with the following steps in a Combinational Logic Diagram:

1.    Start Rinse   

2.    Stop Rinse, Start Soap

3.    Start Brush

4.    Stop Soap, Stop Brush

5.    Start rinse

6.    Stop rinse, Start Dry

7.    Stop Dry

A corresponding LED will light-up when the step is reached on during the car wash sequence/run.  Each LED will be on for 5 seconds.  For steps 2, 4, and 6, those LEDs will light for 8 seconds.

Requirements:  Design Combinational/sequential electronic logic diagram with integrated Circuit items depicted an automated Car Wash process.  All of the integrated circuits used thus far in the course have been 74LS00s and 74000s series.

From the diagram I will actually construct the project on a Pencil Box Logic Designer which has an experimental breadboard. Items used in/on the diagram will include some of the following ICs that can be placed on breadboard:

Logic Gates:

AND gate

Exclusive-OR (XOR) gate

Inverter gate

NAND gate

NOR gate

OR gate

TIMER

Half-Adder

Full-Adder

Comparators

Binary Decoders

Binary-to-Decimal Decoders

Multiplexer (MUX)

Demultiplexer (DEMUX)

Latch

S-R Latch

Gated S-R Latch

D Latch

FLIP-FLOPS

D flip-flop

J-K flip-flop

One shot

Counters & Counter logic operations

Shift Registers

Serial In/Serial Out

Serial In/Parallel Out

Note: Some of the items on the list are combinations of several ICs.  Example: Instead of using XOR gate for logic functions on the diagrams, it can also be a combination of 2 x Inverter Gates, 2 x AND Gates, & 1 x OR Gate.

The PencilBox Logic Designer which I'm using has Logic Indicators (8 x LED), CLOCK, Logic 8 x Switches, 2 x PULSERS push buttons.

The last diagram I completed was a 4-Bit Counter.  See below:

492_4 bit binary counter.png


Related Discussions:- Design combinational-sequential electronic logic gate

Explain tri-state logic inverter, Explain Tri-state logic inverter with the...

Explain Tri-state logic inverter with the help of a circuit diagram. Give its Truth Table. Ans: Tri-state Logic Inverter: The functional diagram of Tri-state Logic Inve

What are the input devices, What are the Input devices Various devices ...

What are the Input devices Various devices are available for data input on graphics workstations. Most systems have a keyboard and one or more additional devices specially desi

Projects on cluster computing, Some famous projects on cluster computing ar...

Some famous projects on cluster computing are as follows: High Net Worth Project: (developed by: Bill McMillan, JISC NTI/65 - The HNW Project, University of Glasgow, The prim

Simplify following using k-map, Q. Explain XNOR gate with three input varia...

Q. Explain XNOR gate with three input variable and draw necessary circuits. Q. Simplify FOLLOWING Using K-Map 1. m0 + m1 + m6 + m7 + m12 + m13 + m8 + m9 2. m0 + m2 + m4 +

Basic of C, write algorithm and draw flowchart for exchange the values of t...

write algorithm and draw flowchart for exchange the values of two variables.

Explain bitwise-and operator, Bitwise-AND Operator: & AND-expression : ...

Bitwise-AND Operator: & AND-expression : relational-expression AND-expression & equality-expression The bitwise-AND operator (&) compares each bit of its first operand t

What is compound statement, What is compound statement If we wish to ha...

What is compound statement If we wish to have more than one statement following the if or the else, they should be grouped together between curly brackets. Such a grouping is c

Temporary registers w and z, Why the temporary registers W and Z are named ...

Why the temporary registers W and Z are named so I mean we start from A,B,C,D,E then H and L coz H stands for higher bit nd L for lower bit of the address pointed by memory pointer

Explain typical packet switching network configuration, Explain typical pac...

Explain typical packet switching network configuration. Packet Switching: In packet switching the nodes handle greatly smaller data length than are determined in message swit

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd