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Question:
(a) With the help of a diagram, describe a typical DNS system.
(b) Using signal sequence or state transition diagrams, illustrate the following scenarios:
i. TCP connection set-up ii. Cumulative Acknowledgement (Given that Seq = 152, Data=8 bytes and 16 bytes) iii. Termination of a connection
(c) Describe the mechanism that is used to perform flow control in TCP.
(d) State the 3 major entities that consists the Electronic Mail system.
(e) For the network below (link costs shown), use the Link State algorithm (Dijkstra) to calculate the least cost route from C to all other nodes.
In this question, you will compare delays in packet switching (i.e. in IP networks), in circuit switching (i.e. in PSTN telephony) and in virtual circuit packet switching (i.e. in
The most expensive method of accessing the Internet is to employ leased lines that directly connect to the ISP. This will enhance access rate to anywhere between 64 K and 1.5 Mbps,
Q Illustrate Return to Zero encoding? - In NRZ-I long strings of 0s may still be a problem - May comprise synchronization as part of the signal for both 1s and 0s - How?
Normal 0 false false false EN-IN X-NONE X-NONE MicrosoftInternetExplorer4
Q. Define the Backbone Networks? Backbone Networks - Allows several LANs to be connected - Non of station is directly connected to the backbone - Stations are part
What are local variables? Local varaiables are those which are declared within a block of code like methods. Local variables should be initialised before accessing them.
Options Negotiation To use any of the options first requires option negotiation between the client and server. Four control characters are used for this purpose.
Determine the term - Mobility Mobility refers to the types of physical transitions that can be done by a mobile node within an 802.11 environment (no transition, movement from
Q. Show VLAN Membership and Configuration? VLAN Membership - May be classified by - Switch port numbers - MAC addresses - IP addresses - IP multicast addresse
In reg-mem architecture, clock cycle is 10 ns wide. It is proposed that reg-reg architecture be used instead, that reduces the clock cycle by 2 ns. However, it requires an addition
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