Define short lines, Electrical Engineering

Assignment Help:

Define Short Lines?

For short power lines (up to 50 miles; 80 km),  the effects of the shunt capacitance and leakage resistance are negligible. Hence the line may be represented by the equivalent circuit shown in Figure.

 

584_Short lines.png

In this case:

 IS = IR (1)

and VS = VR + ZIR    (2)

Comparing equations (1) and (2) with equations

VS = AVR + B IR

IS = C VR + D IR

 the 2-port network constants are:

 A = 1, B = Z

 C = 0, D = 1 = A


Related Discussions:- Define short lines

Show advantages and disadvantages of a r-c couple amplifier, Q. What are th...

Q. What are the advantages and disadvantages of a R-C coupled amplifier. Advantages · It has excellent frequency response. The gain is constant over the audio frequency ra

Aci add immediate with carry instruction, ACI  Add Immediate with Carry  ...

ACI  Add Immediate with Carry  Instruction Similar  to ADC instruction 8 bit  data specified  in the  instruction and Carry  are added to the contents  of the  accumulator and

DLD, draw alogic diagramto implement F=ABCDE using only 3 inputAND gates

draw alogic diagramto implement F=ABCDE using only 3 inputAND gates

Explain cascading of multiple pics 8259, Explain cascading of multiple PICS...

Explain cascading of multiple PICS 8259.  The 8259A adds 8 vectored priority encoded interrupts to the microprocessor. It can be expanded to 64 interrupt requests by using one

How 8255 programmable peripheral interface can operate, What are the differ...

What are the different modes in which 8255 Programmable Peripheral Interface (PPI) can operate? Twenty Four I/O lines in 38-bit port groups - A, B and C A and B can be

Find the parameter values for channel mosfet, Q. Find the parameter values ...

Q. Find the parameter values V T and I DSS for a p- channel MOSFET with i D = 0 when v GS ≤-3 V, and i D = 5 mA when v GS = v DS =-8V.You may neglect the effect of v DS on

Sequential circuit, a 4 bit synchronous counter uses flip flops with propag...

a 4 bit synchronous counter uses flip flops with propagation delay times of 15ns each. what will be the maximum possible time requires for change of state?

Why fet is a voltage sensitive device, Q. Why FET is a voltage sensitive de...

Q. Why FET is a voltage sensitive device explain from the drain characteristics? The JFET consists of a thin layer of n-type material with two ohmic contacts,the source S and t

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd