Define general purpose register architecture, Computer Engineering

Assignment Help:

Q. Define General Purpose Register Architecture?

General Purpose Register (GPR) Architecture: A register is a word of internal memory similar to the accumulator. GPR architecture is an extension of the accumulator idea it implies that use a set of general-purpose registers thatshould be explicitly named by instruction. Registers can be used for anything either holding operands for operations or temporary intermediate values. Dominant architectures are PDP-11, IBM 370 and all (RISC)Reduced Instant Set Computer machines etc. Major instruction set characteristic whether an ALU instruction has two or more operands splits GPR architectures:

'C = A + B'may be implemented on both architectures as:

      Register - Memory                      Load/Store through Registers

      LOAD R1, A                                LOAD R1, A

      ADD R1, B                                   LOAD R2, B

      STORE C, R1                               ADD R3, R1, R2

     STORE C, R3


Related Discussions:- Define general purpose register architecture

Determine by which final selector is connected, The final selector is conne...

The final selector is connected to the (A) calling subscriber.                     (B) switching network. (C) called subscriber.                      (D) li

Explain about programmable logic array, Q. Explain about Programmable Logic...

Q. Explain about Programmable Logic Array? Until now individual gates are considered as fundamental building blocks from that different logic functions can be derived. With the

What is application analysis, What is application analysis? The purpose...

What is application analysis? The purpose of analysis is to understand the problem so that a correct design can be constructed. The application analysis focuses on major applic

What is the syntax of the assembler directive equ, The syntax of the assemb...

The syntax of the assembler directive EQU is ? Ans. The syntax of the assembler directive EQU is as given below: EQU

Compare the cocomo model with the detailed cocomo model, Compare the basic ...

Compare the basic COCOMO model with the detailed COCOMO model. COCOMO having of a hierarchy of three increasingly detailed and accurate forms. -  Basic COCOMO - is a stati

Advantages and drawbacks of mealy and moore machine, What are the advantage...

What are the advantages and drawbacks of mealy and moore machine? Advantages and drawbacks: Into Mealy as the output variable is a function both state and input, changes o

Explain about the term middleware, Explain about the term Middleware. M...

Explain about the term Middleware. Middleware is the term frequently used to explain the application or business logic present within an application server. Unfortunately, simi

What is a digital multiplexer, What is a digital multiplexer?  Ans: ...

What is a digital multiplexer?  Ans: Multiplexer: Data selector or MUX is a logic circuit selects binary information from one of several input and directs this to a sing

What is blocking probability, What is blocking probability? Blocking ...

What is blocking probability? Blocking Probability: The blocking probability P is described as the probability like all the servers in system are busy. If all the servers ar

What are delay systems in telecommunication networks, What are delay system...

What are delay systems in telecommunication networks? Delay System: A class of telecommunication networks like data a network that places the call or message arrivals in a qu

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd