User Account

All Pages

define CISC and RISC ?, Basic Computer Science

Assignment Help:
Two competing architectures were developed for improving the architecture of the central processing unit, and different processors are conventional to each one. Both had their power and weaknesses, and as such also had supporters and detractors.
CISC: Complex Instruction Set Computers
Earlier developments were based in the order of the idea that making the CPU more complex and supporting a superior number of potential instructions would lead to amplified performance. This thought is at the root of CISC processors, such as the Intel x 86 ranges, which have very large instruction sets reaching up to and on top of three hundred separate instructions. They also have amplified complexity in other areas, with many more specialized addressing modes and registers also being implemented and variable length of the instruction codes themselves.
Performance was getting better here by allowing the generalization of program compilers, as the range of more advanced instructions available led to fewer refinements having to be made at the compilation process. But, the complexity of the processor hardware and architecture that resulted can cause such chips to be hard to understand and program for, and also means they can be exclusive to produce.
RISC: (Reduced Instruction Set Computers)
In conflict to CISC, the mid-1980s saw the beginnings of the RISC philosophy. The plan here was that the best way to get better performance would be to make simpler the processor workings as much as probable. RISC processors, for example the IBM PowerPC processor, have a greatly simplified and concentrated instruction set, numbering in the region of one hundred instructions or less. Addressing modes are basic back to four or less, and the length of the codes is fixed so as to allow standardization across the instruction set.
Changing the architecture to this extent means that fewer transistors are used to create the processors. This means that RISC chips are much cheaper to produce than their CISC counterparts. As well the reduced instruction set means that the processor can execute the instructions more rapidly, potentially allowing for greater speeds. However, only allowing such easy instructions means a greater burden is placed upon the software itself. Less instructions in the instruction set means a greater stress on the efficient writing of software with the instructions that are accessible. Supporters of the CISC architecture will point out that their processors are of good sufficient performance and cost to make such efforts not worth the problem.
CISC RISC
Large (100 to 300) Instruction Set Small (100 or less)
Complex (8 to 20) Addressing Modes Simple (4 or less)
Specialized Instruction Format Simple
Variable Code Lengths Fixed
Variable Execution Cycles Standard for most
Higher Cost / CPU Complexity Lower
Compilation Simplifies Processor design
Processor design Complicates Software

Related Discussions:- define CISC and RISC ?

What is the basic model of cpu structure?, As there are many variations i...

As there are many variations in architecture between the different kinds of CPU, we shall begin my looking at an easy model of the structure. The basic model consists of five part

Why is the atm selected as a transport network in 3g, Why is the ATM select...

Why is the ATM selected as a transport network in 3G? Answer: ATM provides efficient support for transmission of voice, data, and video ATM provides QoS guarantee and reliability

Determine whether the system is stable or causal, QUESTION (a) For each...

QUESTION (a) For each of the following systems, determine whether the system is (1) stable, (2) causal, (3) linear, (4) time invariant, (5) passive (i) Y[n] = x[-n] (ii)

Formulate linear programming problem, Question (a) A firm produces four...

Question (a) A firm produces four products: P , Q , R , and S . Each unit of product P requires two hours of milling, one hour of assembly, and $10 worth of in-process in

Algorithm, to print first n even numbers

to print first n even numbers

Explain the term "algorithmic delay", QUESTION a) What is Time Division...

QUESTION a) What is Time Division Multiplexing (TDM), illustrate your answer with a diagram b) Describe four types of RTCP messages c) i) What is silence compression in I

Assignment - concept of programming language , Assignment :  It is compose...

Assignment :  It is composed of variable name, an assignment operator of the language and a value or variable or some expression as per composition allowed based on rules defined

Summery, This is an article and I want great synopsis for the article

This is an article and I want great synopsis for the article

Define Shortest-Job-First (SJF) Scheduling ?, • It is also known as Shortes...

• It is also known as Shortest-Process-Next (SPN). • Shortest-Job-First (SJF) is a non-preemptive order in which waiting job (or process) with the smallest predictable run-time-to-

Finite automata, find the regular expression of(a/?)(a/b)?

find the regular expression of(a/?)(a/b)?

Write Your Message!

Captcha
Order Assignment

Featured Services

Order Now

Popular Subjects

Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

Submit Assignment

Academics

Major Subjects

Majors

Get In Touch

whatsapp: +91-977-207-8620

Phone: +91-977-207-8620

Email: [email protected]

TERMS & POLICIES

HELP & SUPPORT

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd