Data packets - universal serial bus, Computer Engineering

Assignment Help:

Data packets:

A data packet consists of the PID which is followed a 16-bit CRC and by 0-1023 bytes of data payload (up to 1024 in high speed and at most 8 at low speed)

There are 2 basic data packets, DATA0 and DATA1. They have to always be preceded by an address token, and are typically followed by a handshake token from the receiver back to the transmitter. The 2 packet types provide the 1-bit sequence number needed by Stop-and-wait ARQ. If a USB host does not retain a response (such as an ACK) for data it has transmitted, it doesn't know if the data was retained or not; the data may have been lost in transit, or it may have been received but the handshake response was lost.

To solve this type of problem, the device keeps track of the type of DATA x packet it last accepted. If it retains another DATA x packet of the similar type, it is acknowledged but ignored as a case of duplicate. Only a DATA x packet of the opposite type is really received.

When a device is reset having a SETUP packet, it expects an 8-byte DATA0 packet next.

USB 2.0 added DATA2 and MDATA packet types as well. They are used just by high-speed devices doing high-bandwidth isochronous transfers which required transferring more than 1024 bytes per 125 µs "micro frame" (8192 kB/s),PRE "packet"

Low-speed components are supported with a special PID value, PRE. It marks the beginning of a low-speed packet, and it is used by hubs which usually do not send full-speed packets to low-speed devices. As all PID bytes include four 0 bits, they leave the bus in the FS(full speed)K state, which is the similar as the low-speed J state. It is followed by a deep pause during which hubs enable their low-speed outputs that is already idling in the J state, then a low-speed packet follows the starting with a sync sequence and PID byte, and ending with a deep period of SE0. Full-speed components other than hubs can simply avoid the PRE packet and its low-speed contents, till the final SE0 indicates that a new packet follows.


Related Discussions:- Data packets - universal serial bus

Algorithms, Data array A has data series from 1,000,000 to 1 with step size...

Data array A has data series from 1,000,000 to 1 with step size 1, which is in perfect decreasing order. Data array B has data series from 1 to 1,000,000, which is in random order.

What is pipelining, What is pipelining? The overlapping of implementati...

What is pipelining? The overlapping of implementation of successive instructions is known as pipelining.

Priority array, The runqueue is the list of runnable processes on a given p...

The runqueue is the list of runnable processes on a given processor. There is only one runqueue per processor. Each runqueue contains two priority arrays: Active and Expired. Each

What are the benefits of using e-commerce, What are the benefits of using e...

What are the benefits of using e-commerce? Basic Benefits of E-Commerce The main benefits are enhancing sales and reducing costs. The other advantages are as follows: 1.

Term memory as used in a computer context initially, Term memory as used in...

Term memory as used in a computer context initially The term memory as used in a computer context initially referred to magnetic core memory devices which were used beginning

What are the defining traits of an object-oriented language, The defining t...

The defining traits of an object-oriented language are: * Encapsulation * Inheritance * Polymorphism

Explain importance of modems used in data transfer, Explain importance of ...

Explain importance of modems used in data transfer and list some of the V-series recommendations. The series also describes a variety of DCEs using different type modulatio

Describe about modem language, Q. Describe about Modem Language? Modems...

Q. Describe about Modem Language? Modems understand a set of instructions known as Hayes Command Set or AT Command Set. These commands are used to communicate with Modem. At ti

What is meant by super scalar processor, What is meant by super scalar proc...

What is meant by super scalar processor?  Super scalar processors are designed to exploit more instruction level parallelism in user programs. This means that multiple function

Demultiplexers, Explain briefly about demultiplexers?

Explain briefly about demultiplexers?

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd