Constraint satisfaction problems, Computer Engineering

Assignment Help:

Constraint Satisfaction Problems:

Furthermore I was perhaps most proud of AI on a Sunday. However this particular Sunday, a friend of mine found an article in the Observer regarding the High-IQ society, a before brash and even more elitist version of Mensa. Since their founder said that their entrance test was much difficult that some of the problems had never been solved. However the problem given below was in the Observer as that an unsolved problem. Now after looking at it for a few minutes there I confidently told my friend as I would have the answer in half an hour. 

Then after just over 45 minutes there I did indeed have an answer so my friend was suitably impressed. In fact see the end of these notes for the details. Obviously, I didn't spend my time trying to figure it out as whether you want to split the atom, you don't sharpen a knife.

So there instead I used the time to describe the problem to a  constraint solver that is infinitely better at these things than me. Thus the constraint solver is part of good old Sicstus Prolog then specifying the problem was a matter of writing it as a logic program - it's worth pointing out that I didn't justify how to find the solution that just what the problem was. So now with "AI" programming languages as Prolog to every then the intelligence behind the scenes comes in very handy, of course. Hence once I had justified the problem to the solver as a mere 80 lines of Prolog and it took only one hundredth of a second to solve the problem.


Related Discussions:- Constraint satisfaction problems

Which process is used for page reference, Locality of reference implies tha...

Locality of reference implies that the page reference being made by a process is Ans. Locality of reference means that the page reference being made through a process is proba

Illustrate cache dram, Q. Illustrate Cache DRAM? Cache DRAM (CDRAM) wh...

Q. Illustrate Cache DRAM? Cache DRAM (CDRAM) which is developed by Mitsubishi integrates a tiny SRAM cache (16Kb) on a generic DRAM chip. SRAM on the CDRAM can be used in two

What is the disadvantage of strobe method, What is the  disadvantage of st...

What is the  disadvantage of strobe  method. The drawbacks of strobe method are that the source unit that show the transfer has no way of knowing whether the destination unit h

What are the objectives of uml, What are the Objectives of UML tra...

What are the Objectives of UML trace development of UML; recognize and describe notations for object modelling using UML; describe a variety of structural and be

Explain the process of theory driven discovery, Question 1 Explain brie...

Question 1 Explain briefly the process of matching production rules against working memory 2 Explain Simplification, Conjunction and Transportation in propositional logic by

Wrapping database calls into mts transactions, What is the advantage of wra...

What is the advantage of wrapping database calls into MTS transactions? Ans) If database calls are made within the context of a transaction, aborting the transaction will undo a

Generates sequence code, The basic project will have each group generate a ...

The basic project will have each group generate a sequence of 1's and 0's using  the Motorola 688HC11 board to turn ON and then turn OFF the TV set installed in ATRC 306. Each tele

Working of fully parallel associative processor, Q. Working of Fully Parall...

Q. Working of Fully Parallel Associative Processor? Fully Parallel Associative Processor: This processor accepts the bit parallel memory organisation. There are 2 kinds of this

Explain passing parameters in general memory, Q. Explain Passing Parameters...

Q. Explain Passing Parameters in General Memory? The parameters can be passed in the memory too. In such a technique name of the memory location is used as a parameter. The res

Illustrate internal organisation of ram, Q. Illustrate Internal Organisatio...

Q. Illustrate Internal Organisation of RAM? The construction displayed in Figure below is made up of one JK flip-flop and 3 AND gates. The two inputs to system are one input bi

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd