Configure port to send logic, Computer Engineering

Assignment Help:

Configure port A for the lower 4 bits to be inputs and the upper 4 bits to be outputs. The program should chase a logic one from Pa4 -> Pa7, depending upon the condition of Pa0-Pa3 the speed of chase is increased.

Pa0  = 1  Slow Counter  
Pa1  = 1  Counter   
Pa2  = 1  Counter    
Pa3  = 1  Fast  Counter    
 
If all Pa0, Pa1, Pa2, Pa3 = 0 wait
 
The only major difference is the data direction i.e. this configures 4 input lines Pa0-Pa3 and 4 output lines Pa4-Pa7

Paddr
Bit7  Bit6  Bit5  Bit4  Bit3  Bit2  Bit1  Bit0
1  1  1  1  0  0  0  0
 
The full program is shown below

                  name first
padr          equ $0000
paddr        equ $0001
                 org $500
                 ldaa #$f0
                 staa paddr     set up half in and half out
loop0        ldaa #$10
                 staa padr     send data
                 jsr delay
                 ldaa #$20
                 staa padr     send data
                 jsr delay 
                ldaa #$40
                staa padr     send data
                jsr delay
                ldaa #$80
                staa padr     send data
                jsr delay
                jmp loop0
delay        ldab padr    ;get input from port a
                andb #$0f    ;mask of lower nibble only

                beq delay    ;repeat till selected
                ldab padr    ;get port a data again
                andb #$8    ; mask off bit 3 pa3
                bne loop3    ;if select go to loop3
                ldab padr    ;get port a data again
                andb #$4    ; mask off bit 2 pa2
                bne loop4    ;if select go to loop4
                ldab padr    ;get port a data again
                andb #$2    ; mask off bit 1 pa1
                bne loop5    ;if select go to loop5
                ldx #$ffff    ;assume pa0 is pressed load up x with ffff
                jmp loop1    ;carry on
loop2        ldx #$1    ;load up X with 1 fast
                jmp loop1    ;carry on
loop3        ldx #$f      ;load X with f
                jmp loop1
loop4       ldx #$ff    ;load x with ff
               jmp loop1
loop5      ldx #$fff    ;load x with fff slow
loop1      ldab #$1f    ;nested loop
loop6      decb
              bne loop6
              dex
             bne loop1    ;loop till zero
             rts               ;return back to main
             end


Related Discussions:- Configure port to send logic

Read after write and write after write - data hazards, RAW  and WAW - Data ...

RAW  and WAW - Data hazards: RAW (read after write) - j tries to read a source before i writes it, hence j wrongly gets the old value .This is the most usual type of

What are digital signatures and its uses, What are Digital Signatures and i...

What are Digital Signatures and its uses? A digital signature is an electronic quite than a written signature which can be used through someone to authenticate the identity of

The field sy-stepl, The field SY-STEPL refers to The index of the scre...

The field SY-STEPL refers to The index of the screen table row that is presently being processed.  The system variable SY-stepl only has a meaning within the confines of LOOP.

Describe the difference between cache and virtual memory, Question 1: (...

Question 1: (a) What do you meant by an expert system? (b) Describe benefits of the EDI. (c) Describe what you understand by: (i) File Infectors (ii) Boot Sect

What is a c++ class, Class is a user-defined data type in C++. It can be fo...

Class is a user-defined data type in C++. It can be formed to solve a particular kind of problem. After creation the user require not know the specifics of the working of a class.

Example on passing parameters through stack, Q. Example on Passing Paramete...

Q. Example on Passing Parameters through Stack? PROGRAM: Version 3 DATA_SEG               SEGMENT                         BCD DB 25h; Storage for BCD test value BIN

Indias parallel computers, Parallel Computers In India, the design and ...

Parallel Computers In India, the design and development of parallel computers in progress in the early 80?s. The Indian Government recognized the Centre for Development of Adva

The statement vline is used to insert vertical lines, Like ULINE the statem...

Like ULINE the statement VLINE is used to insert vertical lines. No , Vline is not used to insert vertical lines.

Data warehouse, 1) Define a job scheduling strategy that will meet business...

1) Define a job scheduling strategy that will meet business requirement of reporting availability by 6am CST for the following cubes? Show the job scheduling dependencies in a pict

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd