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Configure port A for the lower 4 bits to be inputs and the upper 4 bits to be outputs. The program should chase a logic one from Pa4 -> Pa7, depending upon the condition of Pa0-Pa3 the speed of chase is increased.
Pa0 = 1 Slow Counter Pa1 = 1 Counter Pa2 = 1 Counter Pa3 = 1 Fast Counter If all Pa0, Pa1, Pa2, Pa3 = 0 wait The only major difference is the data direction i.e. this configures 4 input lines Pa0-Pa3 and 4 output lines Pa4-Pa7
Paddr Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 1 1 1 0 0 0 0 The full program is shown below
name first padr equ $0000 paddr equ $0001 org $500 ldaa #$f0 staa paddr set up half in and half out loop0 ldaa #$10 staa padr send data jsr delay ldaa #$20 staa padr send data jsr delay ldaa #$40 staa padr send data jsr delay ldaa #$80 staa padr send data jsr delay jmp loop0 delay ldab padr ;get input from port a andb #$0f ;mask of lower nibble only
beq delay ;repeat till selected ldab padr ;get port a data again andb #$8 ; mask off bit 3 pa3 bne loop3 ;if select go to loop3 ldab padr ;get port a data again andb #$4 ; mask off bit 2 pa2 bne loop4 ;if select go to loop4 ldab padr ;get port a data again andb #$2 ; mask off bit 1 pa1 bne loop5 ;if select go to loop5 ldx #$ffff ;assume pa0 is pressed load up x with ffff jmp loop1 ;carry on loop2 ldx #$1 ;load up X with 1 fast jmp loop1 ;carry on loop3 ldx #$f ;load X with f jmp loop1 loop4 ldx #$ff ;load x with ff jmp loop1 loop5 ldx #$fff ;load x with fff slow loop1 ldab #$1f ;nested loop loop6 decb bne loop6 dex bne loop1 ;loop till zero rts ;return back to main end
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explain different design interrupt processing?
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