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How many two-input AND and OR gates are required to realize Y=CD+EF+G ? Ans. Y=CD+EF+G No. of two i/p AND gates=2 No. of two i/p OR gates = 2 One OR gate to OR CD and EF
Explain Disadvantage of Optimal Page Replacement Algorithm Optimal page replacement algorithm cannot be implemented in the general purpose operating system as it is impossible
Q. Standards for scan codes ? There are 3 standards for scan codes: Mode1 (83-key keyboard PC, PC-XT) and Mode2 (84-key AT keyboard) and Mode3 (101-key keyboard onwards). In Mo
draw input and output charectoristics of BJT and justify CE configuration provides large current amplification
Explain detailed classification of pipelined processor.
SSTF stands for ? Ans. Shortest-Seek-time-first scheduling.
Q. In PRAM model steps required for executing an algorithm? Subsequent steps are performed by a PRAM model whenever executing an algorithm: i) Read phase: First the N proc
Performance of Pipelines with Stalls: A stall is reason of the pipeline performance to degrade the ideal performance. Average in
Explain the working of Dynamic RAM? A plain piece of hardware called a DRAM controller can be used to make DRAM behave more like SRAM and the job of the DRAM controller is to p
In the past there was a large gap between speed of a memory andprocessor. So a subroutine execution for an instruction for illustration floating point addition may have to follow a
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