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Q. The following data were obtained on a 25- kVA, 2400:240-V, 60-Hz, single-phase distribution transformer:
• Open-circuit test with meters on LV side: 240 V, 3.2 A, 165 W
• Short-circuit test with meters on HV side: 55 V, 10.4 A, 375 W
Compute the worst voltage regulation and the power factor at which it occurs, when the transformer is delivering rated output at rated secondary terminal voltage of 240 V. Sketch the corresponding phasor diagram.
Find the power supplied by the voltage source and the power absorbed by the 24 Ω resistor (R3) in the circuit shown below: Determine the voltage V2 in the circuit shown.
Schematic Symbols The junction gate field-effect transistor or JFET gate is sometimes drawn in the middle of the channel (in place of at the drain or source electrode as in t
Module of the rated currents - transformer: The transformer of the Face(Figure) 2 is a transformer of type Delta-Y (the neutral of Y is grounded). The rated output is of 1500
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dear sir, when i am going to simulate my model in matlab i am getting the following error : the derived input for the integrator is inf or nan at time xxxxx. try to reduce the step
Q. A shift register can be used as a binary (a) divide by-2, and (b) multiply-by-2 counter. Explain. Show a block diagram of a 4-bit shift-right register using JKFFs.
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