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What is the impedance Z between terminals A and B of the networks shown below? Express your answers in polar form.
Three voltages represented by v1(t)=100cosωt, v2(t)=70cos(ωt-400) and v3(t)=60sinωt act together in the same circuit. What is the sum of these 3 voltages? Express your answer as a time-domain voltage.
A voltage v(t) = 200cos1000t is applied to a circuit, resulting in a current of i(t) = 10cos(1000t+ π/6). Determine the resistance and reactance of the circuit, the average power dissipated and the power factor.
Q. Compare electromechanical switching system with electronic switching system. Sr. No Electromechanical switching System Electroni
Q. Write a short note on RS-232-C. Ans: RS-232 standard is a collection of connection standards between different pieces of equipment. EIA RS-232 serial communication standard
Write an assembly language program to determine average of 'n' integers. Ans MOV AX, 0000; Initial sum 0000 MOV BX, 0000 MOV SI, 0201H MOV CX, [SI] BACK: I
Turn off Time The time interval between the instant when the SCR current has decreased to zero after external switching of the SCR voltage circuit and the inst
A quantizer has 130 quantum levels that exactly span the extremes of a symmetrically ?uctuating message with step size δv = 0.04 V. Determine the following: (a) |f(t)|max.
Q. The flux in a magnetic core is alternating sinusoidally at a frequency of 500 Hz. The maximum flux density is 1 T. The eddy-current loss then amounts to 15W. Compute the eddy-cu
Describe the process control instructions STC - It sets the carry flag & does not affect any other flag CLC - it resets the carry flag to zero &does not affect any other fl
Q. Explain shockly's equation and its significance in plotting the transfer characteristics ? The linear relationship does not exists in the output of the JFET, the relationshi
design a clipper circuit of a sinsoiudial wave of a peak value 25v&minimum value of -12v to make the output voltages of 20&-9v respectively.
Program counter holds the address of also the first byte of the next instruction to be fetched for implementation or the address of the next byte of a multi byte instruction, which
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