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A three-phase, 34.5-kV, 60-Hz, 40-km transmission line has a per-phase series impedance of 0.2+j0.5/km. The load at the receiving end absorbs 10 MVA at 33 kV. Calculate the following:
(a) Sending-end voltage at 0.9 PF lagging.
(b) Sending-end voltage at 0.9 PF leading.
(c) Transmission system efficiency and transmission-line voltage regulation corresponding to cases (a) and (b).
Explain about the term embedded system. An embedded system is a system which has software embedded within computer-hardware that makes a system dedicated for an application(s)
SID Input Serial input data single bit can be accepted through this pin using RIM command discussed in details in chapter8.
Q. Counters are used to realize various dividers in the schematic representation of the digital clock shown in Figure. The blocks labeled "logic array" are logic gate combinations
Voltage and Frequency Control Methods In this control method the ratio of voltage to frequency is kept constant so that the flux remains constant. The voltage at varia
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Prepare a User Requirement Specification for the monitor and alarm system. User Requirements Specification should be written in a clear and unambiguous manner to state: • The
Consider an RLC series circuit excited by v(t) = V m cos ωt in the time domain. By using superposition, solve for the time-domain forced response of the resultant current through
If an FM signal is given by s FM (t) = 100 cos [2πf c t +100 m(τ ) dτ ] and m(t) is given in figure, sketch the instantaneous frequency as a function of time and determine the pea
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