Cache components-microprocessor, Assembly Language

Assignment Help:

Cache components

The cache sub-system may be divided into 3 functional blocks: Tag RAM, SRAM and theCache Controller. In real designs, these blocks can be implemented  by multiple chips or all can be combined into a single chip.

SRAM :

SRAM (Static Random Access Memory) is memory block which holds the data and the size of the SRAdetermines the size of the cache.

Tag RAM :

Tag RAM (TRAM)  is a small part of SRAM that stores the addresses  of the data that is stored in theSRAM.

Cache controller :

The cache controller is the mind of the cache. Its responsibilities include: performing the  snarfs and snoops, updating the  TRAM  and SRAM and implementing  the write policy.  Also the cache controller is responsible fordetermining if memory request is cacheable  and if a request is a cache miss or hit. The cache controller detects cache misses and controls receiving andsending the cells. This device also controls interface. The cache controller have a status register, which may be read by the processor. The  bits of the status register can be used to signal to the processor.

The cache controller accepts commands from the processor. Following are the examplesof the commands are

  • Reset the Tag Rams
  • Set interrupt mask

 

The cache controller will send a cell to request a cache line when a miss occurs. This cell can also flush an existing dirty line. It  is expecting cell to be returned containing the data, and the CPU is stalled till such a cell is received.

 


Related Discussions:- Cache components-microprocessor

Write policy-microprocessor, Write Policy A write policy determines how...

Write Policy A write policy determines how the cache deals with a write cycle. The 2 common write policies areWrite-Throughand Write-Back. In Write-Back policy, the cache behav

Any project ideas plz, can any one help me in my project by using assembly ...

can any one help me in my project by using assembly language

Interrupt system based on 8259 a-microprocessor, Interrupt System Based on ...

Interrupt System Based on Single 8259 A The 8259A is contained in a 28-pin dual-in-line package that need only a + 5-V supply voltage.  Its organization is shown in given figur

String manipulation instruction-microprocessor, String Manipulation Instruc...

String Manipulation Instruction A series of words or data bytes are available in memory at consecutive locations, to be mention to individually or collectively, are known as by

Define word (dw)- assemblers directive-microprocessor, DW : Define Word:- ...

DW : Define Word:- The DW directive serves the same purposes as the DB directive, but now it makes the assembler  which reserves thenumber ofmemory words (16-bit) instead of by

Overview of intel pro-pentium, Overview of Intel Pro-Pentium : The 2 c...

Overview of Intel Pro-Pentium : The 2 chief players in the PC CPU market are Motorola and Intel.  Intel has enjoyed incredible success with its processors since the early 1980

Data copy/transfer instructions-microprocessor, Data copy/transfer Instruct...

Data copy/transfer Instructions MOV: This data transfer instruction transfers data from one register or memory location to another register or memory location. The source can

Read file in 8086, Write a procedure to read a text file and copy its cont...

Write a procedure to read a text file and copy its contents to another text file using 8086 assembly language .

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd