Buses - computer architecture, Computer Engineering

Assignment Help:

Buses:

  • Execution of 1 instruction need the following 3 steps to be performed by the CPU:

I.  Fetch the contents of the memory location pointed at by the computer system. The contents of this location are interpreted as an instruction to be executed. Therefore, they are holed up in the instruction register (IR). Symbolically, it can be written as:

1438_Buses.png

2. supposing that the memory is byte addressable .it increment the contents of the PC by 4, that is 1155_Buses1.png

3.   Perform the actions mention by the instruction stored in the IR

  • But, in cases wherever an instruction take place more than 1 word, steps 1 and 2 might be repeated as several times as essential to fetch the complete instruction.
  • 2 first steps are typically referred to as the fetch phase.
  • Step 3 constitutes  in the execution phase

 

29_Buses2.png

Most of the operation in step 1 to 3 denoted earlier can be carried out by performing one or more of the following function

However, in cases where an instruction takes place more than 1 word, steps 1 and 2 might be

repeated as several times as essential to fetch the complete instruction.

  • 2 first steps are usually referred to as the fetch phase.
  • Step 3 constitutes in the execution phase

Fetch the contents of a specific memory location and load them into a CPU Register

  • Hold up a word of data from a CPU register into a particular given memory location.
  • Transfer a word of data from 1 CPU register to another or to ALU.
  • Perform logic or arithmetic operation, and store the outcome in a CPU register.

 


Related Discussions:- Buses - computer architecture

What is common type system, What is "Common Type System" (CTS)?  CTS e...

What is "Common Type System" (CTS)?  CTS explain all of the basic types that can be used in the .NET Framework and the operations performed on those type. All this time we hav

How does bus arbitration typically work, How does bus arbitration typically...

How does bus arbitration typically work? i.  A bus master waiting to use the bus asserts by  the bus request. ii.  A bus master cannot be the bus until it's request is grant

What is managed bean or mbean, A managed bean - sometimes simply referred t...

A managed bean - sometimes simply referred to as an MBean - is a type of JavaBean, developed with dependency injection. Managed Beans are particularly used in the Java Management E

Name the popular security measures, Name the popular security measures ...

Name the popular security measures A number of security products covering a broad range of methods are available in the market. Most popular of all the security measures are th

Determine reduced boolean equation and the karnaugh map, Determine reduced ...

Determine reduced Boolean equation and the Karnaugh Map? Illustration : Determine reduced Boolean equation and the Karnaugh Map for the truth table shown below:

What is external procedures, Q. What is External Procedures? These proc...

Q. What is External Procedures? These procedures are written as well as assembled in separate assembly modules and afterwards linked together with the main program to form a bi

What types of data entry services do you perform, What types of data entry ...

What types of data entry services do you perform? Our business is to understand what data you require entered and in what particular format. After an initial analysis is perfor

Difference between relocatable and self relocatable programs, Difference be...

Difference between relocatable and self relocatable programs. A relocatable program is one which can be processed to relocate it to a selected area of memory. For illustratio

Show the memory hierarchy of computer system, Q. Show the Memory Hierarchy ...

Q. Show the Memory Hierarchy of computer system ? Memory in a computer system is essential for storage and subsequent retrieval of instructions and data. A computer system uses

How are problems of clock skew minimized, How are problems of clock skew mi...

How are problems of clock skew minimized? Clock skew, when done right, can also benefit a circuit. This can be intentionally introduced to reduce the clock period, at that the

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd