Buses - computer architecture, Computer Engineering

Assignment Help:

Buses:

  • Execution of 1 instruction need the following 3 steps to be performed by the CPU:

I.  Fetch the contents of the memory location pointed at by the computer system. The contents of this location are interpreted as an instruction to be executed. Therefore, they are holed up in the instruction register (IR). Symbolically, it can be written as:

1438_Buses.png

2. supposing that the memory is byte addressable .it increment the contents of the PC by 4, that is 1155_Buses1.png

3.   Perform the actions mention by the instruction stored in the IR

  • But, in cases wherever an instruction take place more than 1 word, steps 1 and 2 might be repeated as several times as essential to fetch the complete instruction.
  • 2 first steps are typically referred to as the fetch phase.
  • Step 3 constitutes  in the execution phase

 

29_Buses2.png

Most of the operation in step 1 to 3 denoted earlier can be carried out by performing one or more of the following function

However, in cases where an instruction takes place more than 1 word, steps 1 and 2 might be

repeated as several times as essential to fetch the complete instruction.

  • 2 first steps are usually referred to as the fetch phase.
  • Step 3 constitutes in the execution phase

Fetch the contents of a specific memory location and load them into a CPU Register

  • Hold up a word of data from a CPU register into a particular given memory location.
  • Transfer a word of data from 1 CPU register to another or to ALU.
  • Perform logic or arithmetic operation, and store the outcome in a CPU register.

 


Related Discussions:- Buses - computer architecture

What is bank interleaving, Interleaved memory is a method for compensating ...

Interleaved memory is a method for compensating the relatively slow speed of DRAM. The CPU can access alternative sections instantly without waiting for memory to be cached. Multip

Which is most general phase structured grammar, Which is most general phase...

Which is most general phase structured grammar? Context – Sensitive is most common phase structured grammar.

Convert the binary number to gray code, Convert the binary number 10110 to ...

Convert the binary number 10110 to Gray code ? Ans. For changing binary number 10110 in its equivalent Gray code the rules are as, the left most bit that is MSB in Gray code is 1

the bias and standard error , A random variable (X) is modelled as an expo...

A random variable (X) is modelled as an exponentially distributed with mean 30 units. Simulate N = 50 samples from this distribution, and every sample must have m = 20 simulated va

Explain clone process, Explain Clone process. A clone process is genera...

Explain Clone process. A clone process is generated using primitive type clone by duplicating its parent process. However unlike traditional processes it might be share its con

What is soap and how does it relate to xml, The Simple Object Access Protoc...

The Simple Object Access Protocol (SOAP) uses XML to describe a protocol for the exchange of information in distributed computing environments. SOAP having of three components: an

Define process control block, Define Process Control Block (PCB). Pr...

Define Process Control Block (PCB). Process Control Block (PCB): Information related with each process is stored into Process control Block. a)      Process state b)

Why do we call motherboard a motherboard, Motherboard is called as motherbo...

Motherboard is called as motherboard because in the world all borned creature is directly attached to her mother & after it all the relations makes due to her mother so in the simi

Register organisation, The number and nature of registers is a major factor...

The number and nature of registers is a major factor which distinguishes among computers. For illustration, Intel Pentium has about 32 registers. A number of these registers are sp

Speed of memory versus speed of CPU, In the past there was a large gap betw...

In the past there was a large gap between speed of a memory andprocessor. So a subroutine execution for an instruction for illustration floating point addition may have to follow a

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd