Buses - computer architecture, Computer Engineering

Assignment Help:

Buses:

  • Execution of 1 instruction need the following 3 steps to be performed by the CPU:

I.  Fetch the contents of the memory location pointed at by the computer system. The contents of this location are interpreted as an instruction to be executed. Therefore, they are holed up in the instruction register (IR). Symbolically, it can be written as:

1438_Buses.png

2. supposing that the memory is byte addressable .it increment the contents of the PC by 4, that is 1155_Buses1.png

3.   Perform the actions mention by the instruction stored in the IR

  • But, in cases wherever an instruction take place more than 1 word, steps 1 and 2 might be repeated as several times as essential to fetch the complete instruction.
  • 2 first steps are typically referred to as the fetch phase.
  • Step 3 constitutes  in the execution phase

 

29_Buses2.png

Most of the operation in step 1 to 3 denoted earlier can be carried out by performing one or more of the following function

However, in cases where an instruction takes place more than 1 word, steps 1 and 2 might be

repeated as several times as essential to fetch the complete instruction.

  • 2 first steps are usually referred to as the fetch phase.
  • Step 3 constitutes in the execution phase

Fetch the contents of a specific memory location and load them into a CPU Register

  • Hold up a word of data from a CPU register into a particular given memory location.
  • Transfer a word of data from 1 CPU register to another or to ALU.
  • Perform logic or arithmetic operation, and store the outcome in a CPU register.

 


Related Discussions:- Buses - computer architecture

Demorgan''s first theorem, DeMorgan's first theorem shows the equivalence o...

DeMorgan's first theorem shows the equivalence of which logic gate ? Ans. DeMorgan's first theorem depicts the equivalence of NOR gate and Bubbled AND gate. For De Morgan's

Software engineering, how many errors will be left after defect amplificat...

how many errors will be left after defect amplification and removal method on the following data design=40 analysis=30 maintenance=20 testing 35 coding 25 take 75% removal efficie

Host computer-array processing, Host Computer:  An array processor may be a...

Host Computer:  An array processor may be attached to a host computer by the control unit. The reason of the host computer is to broadcast a sequence of vector instructions by CU t

IEEE802, 1. (a) Given a baseband bus with station 1 located at 10m, station...

1. (a) Given a baseband bus with station 1 located at 10m, station 2 located at 1000m, and station 3 located at 1010 meters (see diagram above). If the data rate of the bus is 10 M

Other equivalences, Equivalences: In this following miscellaneous equi...

Equivalences: In this following miscellaneous equivalence rules are often useful during rewriting sessions. So there the first two allow us to completely get rid of implicatio

What is reducibility, What is reducibility?  The primary method of prov...

What is reducibility?  The primary method of proving some problems are computationally unsolvable.       It is known as reducibility. Reducibility always includes two problems

Workday versus oracle, Workday has set the stage to revolutionize the way c...

Workday has set the stage to revolutionize the way companies manage and facilitatevarious aspects of their business operationsby utilizing cutting-edge cloud-based technologies in

Data mining, what is data mining and what is its uses in a industry?

what is data mining and what is its uses in a industry?

What are the principal shortcomings of mpi, (a) What are the principal sho...

(a) What are the principal shortcomings of MPI with respect to the deployment between companies and institutions? (b) Propose a possible solution for the parallel computing in

Implement a priority queue, 1. Insert the following characters with their r...

1. Insert the following characters with their respective priorities (shown as ordered pairs) into an empty treap: (K, 17), (F, 22), (P, 29), (M, 10), (N, 15), (L, 26), (G, 13),

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd