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Q. A shift register can be used as a binary (a) divide- by-2, and (b) multiply-by-2 counter. Explain. Q. Show a block diagram of a 4-bit shift-right register using JKFFs.
Q. A 75-kVA transformer has an iron loss of 1 kW and a full-load copper loss of 1 kW. If the transformer operates on the following load cycle, determine the all-day efficiency:
These are small poles fixed to the yoke and spaced in b/w the main poles. They are wound with comparatively few heavy gauge Cu wire turns and are connected in series with the armat
Short-Term Measures for Technical Loss Reduction The short-term measures involve measures needs for immediate improvement and reduction of losses within the system. These are
Characteristics of unijunction transistor: Characteristics : The static emitter characteristic of UJT at a given inter base voltage VBB in shown in fig. From fig., it is no
Q. Explain Light-emitting diode? This is a reliable, rugged, and inexpensive semiconductor display device requiring about 10 mA of current flow for full illumination. An LED is
short note on cumulative error
The resistance of a 5 m length of wire is 600Ω.Determine: a) the resistance of an 8 m length of the same wire, b) the length of the same wire when the resistance is 420Ω
Refer to Figure 100. Assume MKS units. Given: R1= 4, R2=14, R3= 9, I4= 8, I5= 7. Determine: Ieq, Req, and V3.
The assignment comprises two parts, a CPLD Design Exercise and a CPLD Design Project. The CPLD Design Exercise will enable you to acquire competance in programmable logic design
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