Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Binary floating-point number range?
Smallest Negative number
Maximum mantissa and maximum exponent
= - (1 -2-24) × 2127
Largest negative number
Minimum mantissa and Minimum exponent
= -0.5 × 2-128
Smallest positive number
= 0.5 × 2-128
Largest positive number
= (1 -2-24) × 2127
Figure: Binary floating-point number range for given 32 bit format
In floating point numbers basic transaction is between range of numbers and accuracy also known as precision of numbers. If we raise exponent bits in 32-bit format then range can be increased but accuracy of numbers would go down as size of mantissa would become smaller. Let's have an illustration that will elucidate term precision. Suppose we have one bit binary mantissa then we would be able to represent only 0.10 and 0.11 in normalised form as provided in above illustration (having an implicit 1). Values like 0.101, 0.1011 and so on can't be represented like complete numbers. Either they have to be estimated or truncated and would be represented as either 0.10 or 0.11. So it will produce a truncation or round off error. The higher the number of bits in mantissa better would be precision.
In case of floating point numbers for raising both precision and range more bits are required. This can be obtained by employing double precision numbers. A double precision format is generally of 64 bits.
Institute of Electrical and Electronics Engineers (IEEE) is a group that has created many standards in aspect of various aspects of computer has created IEEE standard 754 for floating-point representation and arithmetic. Fundamental aim of developing this standard was to facilitate portability of programs from one to another computer. This standard has resulted in growth of standard numerical capabilities in different microprocessors. This representation is displayed in figure below.
Figure: IEEE Standard 754 format
Address translation with dynamic partition : Given figure shows the address translation process with dynamic partitioning, where the processor provides hardware support for
Q. Writing down your own Interrupt Service Routines? Here are a few rules which should be kept in mind while writing down your own Interrupt Service Routines: 1. Use Int 21
Q. Illustrate processor arrangements? HPF$ PROCESSORS P2 (4, 3) !HPF$ TEMPLATE T2 (17, 20) !HPF$ DISTRIBUTE T2 (BLOCK, *) ONTO P1 Means that first dimension of T2 woul
Q. Describe Miscellaneous and Privileged Instructions? These instructions don't fit in any of above categories. I/O instructions: start I/O, stop I/O, and test I/O. Characteris
Aggregation is the relationship among the whole and a part. We can add/subtract some properties in the part (slave) side. It won't affect the entire part. Best example is Car,
Explain the various interface circuits. An I/O interface having of circuitry required to connect an I/O device to computer bus. One side having of a data path with its associa
It is a 16 bit special function register in the 8085 microprocessor. It remains track of the next memory address of the instruction that is to be implemented once the implementatio
Write down the basic performance equation? T=N*S/R T=processor time N=no.of instructions S=no of steps R=clock rate
What happens when HLT instruction is implemented in processor? Ans) The Micro Processor go into the Halt-State and the buses are tri-stated.
Please explain the construction and working of calomel electrode..
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +1-415-670-9521
Phone: +1-415-670-9521
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd