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Q. Explain the basic architecture of digital switching systems. Explain in detail companding.
Ans:
A simple N X N time division space switch is displayed in Figure. Switch can be represented in an equivalence form as a two-stage network with N X 1 and 1 X N switching matrices for first and second stages corresponding as displayed in Figure. Network has one link interconnecting the two stages. Every inlet/outlet is a single speech circuit corresponding to a subscriber line. Speech is carried as PAManalogue samples or PCM digital samples, occurring at 125-µs intervals. When PAM samples are switched in a time division manner, switching is called analogue time division switching. If PCM binary samples switched, then switching is termed as digital time division switching. In Figure, the interconnected by a suitable control mechanism and speech sample transferred from the inlet to the outlet.
In order to demonstrate aliasing, make a plot of the signal x(t) = 3 cos 2π10t - cos 2π30t which approximates a square wave with W = 30 Hz. If the sample points are taken at
Q. Give a block diagram for amodulo-5 binary ripple counter using JKFFs and draw its timing diagram.
Design a recycling MOD 19 up counter using JK FFs. In your design, include the logic circuit diagram and the timing diagram output that counts from 000002 = 010 to 100112 = 1910. C
i v characteristics of practical current source
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Q. The effective area of a dipole is given by A e =0.13λ 2 . Find the effective area of a half-wave dipole at 3 GHz.
explain electromechanical instrument
IFYOU AVE TWO DC MOTOR,RELAY,TWO BATTERYAND MICROCONTROLLER FLOW CHART TO RUN MOTOR AND CONTROL TWO BATTERIES
what is the digital logic circuit for binary divider?
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