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Q. Explain the basic architecture of digital switching systems. Explain in detail companding.
Ans:
A simple N X N time division space switch is displayed in Figure. Switch can be represented in an equivalence form as a two-stage network with N X 1 and 1 X N switching matrices for first and second stages corresponding as displayed in Figure. Network has one link interconnecting the two stages. Every inlet/outlet is a single speech circuit corresponding to a subscriber line. Speech is carried as PAManalogue samples or PCM digital samples, occurring at 125-µs intervals. When PAM samples are switched in a time division manner, switching is called analogue time division switching. If PCM binary samples switched, then switching is termed as digital time division switching. In Figure, the interconnected by a suitable control mechanism and speech sample transferred from the inlet to the outlet.
Two identical three-phase, 33-kV, wye connected, synchronous generators operating in parallel share equally a total load of 12 MW at 0.8 lagging power factor. The synchronous react
Q. The parameters of a BJT are given by α = 0.98, I CBO = 90 nA, and i C = 7.5 mA. Find β, iB, and iE.
D flipflop
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a. Determine the ratio of cross section of a circular waveguide to that of a rectangular one, if each is to have similar cut off wavelength for its dominant mode. b. Compare wav
RESETIN Input It is an active low signal when it goes low program counter is reset to zero and busses are tri stated it also reset interrupt enable flip flop and instruc
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how to design a 32:1 multiplexer using two 16:1 multiplexers and a 2:1 multiplexer?
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SUI Subtract Immediate I Instructions The 8 bit data specified in the instruction is directly subtracted from the contents of accumulator and results of operation
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