Basic architecture of computer system, Computer Engineering

Assignment Help:

Q. Basic Architecture of computer system?

Replacing the ALU and CU (i.e., CPU) of Figure by a microprocessor, and storing instructions and data in the same memory, one arrives at a stored-program computer or a microcomputer. A bus, which is a set of wires carrying address, data, and control signals, is employed for interconnecting themajor components of amicrocomputer system.The address lines are unidirectional signals that specify the address of a memory location of an I/O device. With a typical 24-bit address bus, the microprocessor can access 224 (over 16 million) memory locations.

2497_Architecture.png

Memory is generally organized in blocks of 8, 16, or 32 bits. The data bus is a bidirectional bus, varying in size from 8 to 32 bits, which carries data between the CPU, MU, and I/O units. The control bus provides signals to synchronize the memory and I/O operations, select either memory or an I/O device, and request either the read or the write operation from the device selected. While there are virtually countless variations in microprocessor circuit configurations, the system architecture of a typical microprocessor is shown in Figure. The arithmetic logic unit (ALU) accepts data from the data bus, processes the data as per program-storage instructions and/or external control signals, and feeds the results into temporary storage, from which external control and actuator control functions can be performed. The accumulators are parallel storage registers used for processing the work in progress, temporarily storing addresses and data, and housekeeping functions. The stacks provide temporary data storage in a sequential order and are of use during the execution of subroutines. A subroutine is a group of instructions that appears only once in the program code, but can be executed from different points in the program. The program counter is a register/counter that holds the address of the memory location containing the next instruction to be executed. The status register contains condition-code bits or flags (set to logic 1 or logic 0, depending on the result of the previous instruction) that are used to make decisions and redirect the program flow. The control unit (CU), which consists of the timing and data-routing circuits, decodes the instruction being processed and properly establishes data paths among the various elements of the microprocessor. Interconnections may take the form of gates that the control section enables or disables according to the program instructions. That is to say, programming at the machine-language level amounts to wiring with software instead of hard-wired connections.


Related Discussions:- Basic architecture of computer system

How does the xml serializer work, How does the Xml Serializer work?  What A...

How does the Xml Serializer work?  What ACL permissions does a process using it require?   Xml Serializer needs write permission to the system's TEMP directory.

Secondary memory and characteristics, It is desirable that operating speed ...

It is desirable that operating speed of primary storage of a computer system be as fast as possible since most of the data transfer to and from processing unit is via main memory.

What are the 2 other types of views, What are the 2 other types of Views, w...

What are the 2 other types of Views, which are not allowed in Release 3.0? The two views are:- Structure Views. Entity Views.

Over fitting considerations, Over fitting Considerations : Hence in le...

Over fitting Considerations : Hence in left unchecked there backpropagation in multi-layer networks can be highly susceptible to overfitting itself to the training examples. B

What do you mean by instruction cycle, Q. What do you mean by instruction c...

Q. What do you mean by instruction cycle? We have considered the instruction execution in previous section. Now let's consider more about different types of instruction executi

Explain r-2r ladder d/a converter, Explain R-2R ladder D/A converter. A...

Explain R-2R ladder D/A converter. Ans. R-2R ladder D/A converter: An R-2R ladder D/A converter is shown in Fig.(a). It uses resistors of only two values R and 2R. The inp

Boolean expression derived from this k-map, Let us see the pairs that can b...

Let us see the pairs that can be considered as adjacent in Karnaugh's here. The pairs are:  1)  The four corners  2)  The four 1's as in top and bottom in column 00 & 01

Transition table for sequential circuits, sovling questions on transition t...

sovling questions on transition table for sequential circuits

What is middleware net dynamics, NetDynamics Application Server was the pri...

NetDynamics Application Server was the primary Java-based integrated software platform. The product was developed by NetDynamics Inc. As Java became the dominant development langua

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd