Average access time experienced by the processor, Computer Engineering

Assignment Help:

Give the formula for the average access time experienced by the processor in a system with 2 levels of caches.

Ans: Formula is for the average access time experienced by the processor in a

system having two levels of caches is described follow:

               tave = h1C1+(1-h1)h2C2+(1-h1)(1-h2)M

h1=> hit rate in the L1 cache

h2= > hit rate in the L2 cache

M=> it's time to access information in the main memory

C1=> it's for time to access information in the L1 cache

 C2=>  it's for time to access information in the L1 cache

Explain Hit and Miss?

Ans. The performance of cache memory is often measured in terms of a quantity is said hit ratio. When the CPU refers to memory and finds the word in cache, it is said hit. If the word is not found in cache, then it is in primary memory and it counts as a miss.


Related Discussions:- Average access time experienced by the processor

Explain increments and skips subsequent instruction, Q. Explain Increments ...

Q. Explain Increments and skips subsequent instruction? Increments A and skips subsequent instruction if the content of A has become 0. This is a complex instruction then requi

Explain working of d flip -flop, Q. Explain working of D Flip -Flop? D ...

Q. Explain working of D Flip -Flop? D (data) flip-flop is modification of RS flip-flop. Problem of undefined output in SR flip-flop when both R and S become 1 gets avoided in D

Paging, specification of paging ram size is 12 frames

specification of paging ram size is 12 frames

How do you ensure that our records are scanned accurately, How do you ensur...

How do you ensure that our records are scanned accurately? Not only do we have a highly trained and capable staff, we also have quality controls in place to make sure your reco

Appropriate problems for ann learning, Appropriate Problems for ANN learnin...

Appropriate Problems for ANN learning: Conversely as we did for decision trees there it's important to know where ANNs are the right representation scheme for such job. Howeve

Time complexity, Take a look at the code and try to understand the logic, p...

Take a look at the code and try to understand the logic, particularly, the way scrambled words are disambiguated, i.e.., whether they are matched successfully against a correct wor

What is the purpose of cdata in an xml document, Question: (a) What is...

Question: (a) What is the purpose of CDATA in an XML document? Explain your answer using extract codes. (b) Consider the following definition for an address element:

What are the advantages of open source system, What are the advantages of o...

What are the advantages of open source system? High-quality software Lesser hardware costs Integrated management No vendor lock-in Take control of our softwa

Determine the uses of memory blocks, Determine the Uses of memory blocks. ...

Determine the Uses of memory blocks. Not as common a technique though something to consider. As Verilog has a very convenient syntax for declaring and loading memories, you ca

War (write after read) - data hazards , WAR (write after read) - Data hazar...

WAR (write after read) - Data hazards in computer architecture: WAR (write after read) - j tries to write at destination before it is read by i , hence i  wrongly gets the n

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd