Associative mapping - computer architecture, Computer Engineering

Assignment Help:

Associative Mapping:

It is a more flexible mapping technique

  • A primary memory block can be placed into any specific cache block position.
  • Space in the cache may be used more efficiently, but require to search all 128 tag patterns.

 Set-Associate Mapping

Combination of the - associative and direct mapping technique

  • Blocks of the cache are combined into sets, and the mapping permit a block of the primary

memory to reside in any  particular block of a specific set.

Note: Memory blocks 0, 64, 128,..., 4032 maps into cache set 0.

793_Associative Mapping.png


Related Discussions:- Associative mapping - computer architecture

Is dos a real time os, DOS is not a RTOS (real time Operating system), thou...

DOS is not a RTOS (real time Operating system), though MS DOS can be used with certain APIs to attain the RTOS functionality. For example, the RT Kernel (Real Time Kernel) which ca

Avoiding overfitting - decision tree learning , Avoiding Overfitting : ...

Avoiding Overfitting : However remember there that in the previous lecture, there is over fitting that common problem in machine learning. Furthermore details to decision tree

Explain the process of inter-register signalling, Explain the process of in...

Explain the process of inter-register signalling. Registers are utilized in common control exchanges to store and analyze routing data. They are given on a common basis is a

Microprocessor 8086, i want to know complete detail of 8086 microprocessor ...

i want to know complete detail of 8086 microprocessor such as memory segment ,interface with ram rom ect

Basic concept of data parallelism, Basic Concept of Data Parallelism T...

Basic Concept of Data Parallelism Thinking the condition where the same problem of submission of „electricity bill? is Handled as follows: Again, three are counters. Howeve

State about the logic micro-operations, State about the Logic Micro-operati...

State about the Logic Micro-operations These operations are performed on binary data stored in register. For a logic micro-operation each bit of a register is treated as a diff

Explain program interpretation process, Explain program interpretation pr...

Explain program interpretation process. In a program interpretation process , the interpreter reads the source program and stores this in its memory. This bridges an executi

Design an or to and gates combinational network, Design an OR to AND gates ...

Design an OR to AND gates combinational network and NAND only n/w for the following Boolean expression: A'BC'D + ABC'D' + A'B'CD' + A'BCD'

Mips - computer architecture, MIPS - computer architecture: The MIPS ...

MIPS - computer architecture: The MIPS ISA, so far 3 instruction formats Fixed 32-bit instruction 3-operand, load-store architecture 32 general-purpose register

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd