Associative array processing, Computer Engineering

Assignment Help:

Consider that a list of record or a table is stored in the memory and you wish to find some information in that particular list. E.g. the list comprises three fields as displayed below:

331_Associative Array Processing.png

Assume that we want to find the age and ID number of Ravi. If we use conventional RAM, it is essential to give the exact physical address of entry associated to Ravi in the instruction access entry such as:

    READ ROW 3

Another alternative idea is that we explore the whole list by means of the Name field as an address in instruction like:

    READ NAME = RAVI

Again with serial access memory this option may be implemented simply but it's a very slow process. An associative memory assists at this point and concurrently examines all the entries in the list and returns the desired list very rapidly. SIMD array computers have been developed with associative memory. This memory is content addressable memory by which it's meant that multiple memory words are accessible concurrently. The parallel accessing feature support parallel search and parallel compare too. This ability can be used in numerous applications like:

  • Radar signal tracking
  • Image processing
  • Artificial Intelligence
  • Retrieval and Storage of databases that are changing rapidly

The inherent parallelism characteristic of this memory has huge advantages and impact in parallel computer architecture. The associative memory is expensive compared to RAM. The array processor built with associative memory is termed as Associative array processor. In this section we explain a number of categories of associative array processor. Kinds of associative processors are based on organisation of associative memory. So first we discuss about associative memory organisation.


Related Discussions:- Associative array processing

Exception handling and recursion, In the previous assignment, you implement...

In the previous assignment, you implemented a stack and a list that both inherited from the abstract class ArrayIntCollection. In this task you are supposed to extend that implemen

Explain procedure level of parallel processing, Procedure Level Here, p...

Procedure Level Here, parallelism is obtainable in the form of parallel executable procedures. In that case, design of algorithm plays a key role. E.g. every thread in Java is

Explain dos function call with one illustration, Explain DOS function call ...

Explain DOS function call with one illustration DOS function call In order to use DOS function calls, always place function number into register AH and load all other re

Is it possible to create graph form spreadsheets, Is it possible to create ...

Is it possible to create graph form spreadsheets For example IF G5 > 100 THEN "Y" ELSE "N" -  It's also possible to create graphs and charts from spreadsheets (such as using

Does c have circular shift operators, No C don't have circular shift operat...

No C don't have circular shift operator. (Part of the reason why that is the sizes of C's types aren't precisely described----but a circular shift makes most sense when applied to

Function of host to host transport layer in tcp/ip protocol, Illustrate the...

Illustrate the function of host to host transport layer in TCP/IP protocol stack? Function of Host - to-Host Transport Layer: This protocol layer just above inter network

Permanently resident pages - main memory, Permanently resident pages: ...

Permanently resident pages: Every virtual memory systems have memory areas that are "pinned down", for example cannot be swapped out to secondary storage, for instance:

Architecture of world wide web with the basic entities, Explain architectur...

Explain architecture of World Wide Web with the basic entities. The architecture of the World Wide Web, demonstrated below, is the one of clients, as like Netscape, Lynx or Int

Compare single bus structure and multiple bus structure, Compare single bus...

Compare single bus structure and multiple bus structure? A system that having only one bus(i.e only one transfer at a time) is known as a single bus structure. A system is know

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd