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Consider that a list of record or a table is stored in the memory and you wish to find some information in that particular list. E.g. the list comprises three fields as displayed below:
Assume that we want to find the age and ID number of Ravi. If we use conventional RAM, it is essential to give the exact physical address of entry associated to Ravi in the instruction access entry such as:
READ ROW 3
Another alternative idea is that we explore the whole list by means of the Name field as an address in instruction like:
READ NAME = RAVI
Again with serial access memory this option may be implemented simply but it's a very slow process. An associative memory assists at this point and concurrently examines all the entries in the list and returns the desired list very rapidly. SIMD array computers have been developed with associative memory. This memory is content addressable memory by which it's meant that multiple memory words are accessible concurrently. The parallel accessing feature support parallel search and parallel compare too. This ability can be used in numerous applications like:
The inherent parallelism characteristic of this memory has huge advantages and impact in parallel computer architecture. The associative memory is expensive compared to RAM. The array processor built with associative memory is termed as Associative array processor. In this section we explain a number of categories of associative array processor. Kinds of associative processors are based on organisation of associative memory. So first we discuss about associative memory organisation.
Using ARQ, a sending modem must wait for a return ACK for each sent block before sending the next block. (A) discrete (B)
Q. Define the ADDRESSING MODES? The elementary set of operands in 8086 can reside in memory, register and immediate operand. How can these operands be retrievedby various addre
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Q. Subsequent statements set every element of matrix? Let a= [2,4,6,8,10], b=[1,3,5,7,9], c=[0,0,0,0,0] Consider the subsequent program section FORALL (i = 2:4) a(i)
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What do you mean by underflow and overflow of data? Underflow and overflow of data: When the value of the variable is either too long or too small for the data type to hold,
Differentiate between pre-emptive and non-pre-emptive scheduling. Pre-emptive scheduling : in its approach, center processing unit can be taken away from a process if there is a
The NOR gate. The NOR gate is equivalent to an OR gate followed by a NOT gate so that the output is at logic level 0 when any of the inputs are high otherwise it is at logic le
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