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Consider that a list of record or a table is stored in the memory and you wish to find some information in that particular list. E.g. the list comprises three fields as displayed below:
Assume that we want to find the age and ID number of Ravi. If we use conventional RAM, it is essential to give the exact physical address of entry associated to Ravi in the instruction access entry such as:
READ ROW 3
Another alternative idea is that we explore the whole list by means of the Name field as an address in instruction like:
READ NAME = RAVI
Again with serial access memory this option may be implemented simply but it's a very slow process. An associative memory assists at this point and concurrently examines all the entries in the list and returns the desired list very rapidly. SIMD array computers have been developed with associative memory. This memory is content addressable memory by which it's meant that multiple memory words are accessible concurrently. The parallel accessing feature support parallel search and parallel compare too. This ability can be used in numerous applications like:
The inherent parallelism characteristic of this memory has huge advantages and impact in parallel computer architecture. The associative memory is expensive compared to RAM. The array processor built with associative memory is termed as Associative array processor. In this section we explain a number of categories of associative array processor. Kinds of associative processors are based on organisation of associative memory. So first we discuss about associative memory organisation.
what is dbms goal?
? UML is called as Unified Modeling Language. ? it is used to Graphical language for visualizing artifacts of the system. ? It Allow to make a blue print of all the aspects
calculate the time complexity of a=(b/c) operation in stack
Instruction execution is performed in CPU registers. Although before we define process of instruction execution let's first give details on Registers (temporary storage location in
What are the central interfaces of the R/3 system? There are three central interfaces:- Presentation Interface. Database Interface. Operating system Interface.
What is page fault? Its types? Page fault refers to the situation of not having a page in the major memory when any process references it. There are two kinds of page fault :
'LRU' page replacement policy is ? Ans. Least Recently Used.
Multidimensional support is very necessary if we are to contain multiple hierarchies in our data analysis. Multidimensional feature permits a user to examine business and organizat
Define Hit ratio. The performance of cache memory is frequently measured in terms of quantity called hit ratio. Hit-Find a word in cache. Miss-Word is not found in cache.
Stack pointer is a particular purpose 16-bit register in the Microprocessor, which grasp the address of the top of the stack.
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