Analysis of merge sort, Computer Engineering

Assignment Help:

i) The width of the sorting + merging circuit is equivalent to maximum number of devices needed in a phase is O(n/2). As in the above diagram maximum number of devices for a given phase is 4 that is 8/2 or n/2. 

ii) The circuit comprises two sorting circuits for sorting sequences of length n/2 and afterwards one merging circuit for merging of two sorted sub sequences (see phase 4th  in above figure). Let functions Tm and Ts signify the time complexity of merging and sorting in terms of its depth.

The Ts can be calculated as follows:  

               Ts (n) =Ts (n/2) + Tm (n/2) 

               Ts (n) =Ts (n/2) + log (n/2), 

 Therefore, Ts (n) is equal to O (log2 n).

2264_Analysis of Merge Sort.png

Figure: Sorting + Merging Circuit


Related Discussions:- Analysis of merge sort

Xor gate, The XOR gate. The exclusive OR or XOR gate is similar to a tw...

The XOR gate. The exclusive OR or XOR gate is similar to a two input OR gate. The output of an XOR gate is logic 1 only when one input or the other input is high and is 0 when

Differentiate among validation and exception testing, Differentiate between...

Differentiate between validation and exception testing. - Validation testing is done to test software in conformance to requirements specified. It aims to demonstrate that soft

Define memory utilization factor, Memory utilization factor shall be comput...

Memory utilization factor shall be computed as? Ans. memory in use/total memory connected.

The six various application of stack, The six several application of stack ...

The six several application of stack in computer application is: 1.  Conversion of infix to postfix notation and vice versa. 2.  Evaluation of arithmetic expression. 3.

Writing down your own interrupt service routines, Q. Writing down your own ...

Q. Writing down your own Interrupt Service Routines? Here are a few rules which should be kept in mind while writing down your own Interrupt Service Routines: 1.  Use Int 21

Explain vector-memory instructions, Vector-Memory Instructions When vec...

Vector-Memory Instructions When vector operations with memory M are carried out then these are vector-memory instructions. These instructions are referred with the subsequent f

What are the disadvantages of fcfs scheduling algorithm, What are the disad...

What are the disadvantages of FCFS scheduling algorithm as compared to shortest job first (SJF) scheduling? Disadvantages: (i) Waiting time can be huge if short requests w

How to access the disk data, Q. How to Access the Disk Data? Disks oper...

Q. How to Access the Disk Data? Disks operate is semi-random mode of operation and generally referenced block wise. The data access time on a disk comprises two major component

What do you eman by processors hypercube, Q. What do you eman by Processors...

Q. What do you eman by Processors Hypercube? This is precise to in the hypercube. Every processor is portrayed by set of nodes of graph and different arcs are represented with

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd