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in DC series generator we consider Eg=V+Ia(Ra+Rse).But in DC shunt generator why it is only Eg=V+IaRa and not Eg=V+Ia(Ra*Rsh/Ra+Rsh)
Design a mod-15 counter. Explain the various steps in designing the counter
Latch A 8 bit latch comprises of transparent latch D flip flop. It is commonly used to interface output device with microprocessor. A typical example of such 8 bit latc
Q. Differential amplifier to eliminate the common-mode voltage? The transducer in some cases may have a local ground that cannot be disconnected. In such a case, a separate gro
What is the purpose of carry (c) flag and zero (z) flag? Carry flag conatins the carry after addition or borrow after subtraction. This carry flag also shows error conditions,
Q. Describe the working of bistable multivibrator A bistable circuit is one which can exit indefinitely in either of two stable states and which can be induced to make an abru
Explain the effect of a dielectric on the behaviour of a capacitor. If two parallel plates are separated by a distance 'd' (meters) in vacuum and are kept at a potential diffe
Write an assembly language program to determine average of 'n' integers. Ans MOV AX, 0000; Initial sum 0000 MOV BX, 0000 MOV SI, 0201H MOV CX, [SI] BACK: I
Q. Input offset voltage of operational amplifier? When both inputs are tied to ground, i.e., both differential-mode and common-mode inputs are zero, the output should be zero.
Q. Sketch g m versus v GS for a JFET with I DSS = 10 mA, V P = 3V, V A = 100 V, and v DS = 10 V. See what happens if V A →∞. Also sketch r o versus v GS .
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