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Address translation with dynamic partition:
Given figure shows the address translation process with dynamic partitioning, where the processor provides hardware support for address protection, translation and relocation.
Address translation having dynamic partition
The base register keeps the entry point of the program, and can be added to a relative address to produce an absolute address. The bounds register show the ending location of the program, which is utilized to compare with each physical address produced. If the later is within bounds, then the execution can proceed; or else, an interrupt is produced, indicating illegal access to memory. The relocation can be simply supported with this mechanism having the new beginning address and ending address assigned respectively to the base register and the bounds 7 register.
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By using XNOR gate if the signals are similar then only the output will be one otherwise not.
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the block diagram of an 8086 processor
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