Address phase - computer architecture, Computer Engineering

Assignment Help:

Address phase:

A PCI bus transaction starts having an address phase. The initiator,  after seeing that it has GNT# and the bus is inactive, drives the target address onto the AD[31:0] lines, the associated command (for example: I/O write or memory read,) on the C/BE[3:0]# lines, and pulls FRAME# low.

Each other device inspect the address and command & decides whether to respond as the target by asserting DEVSEL#. Device has to respond by asserting DEVSEL# within 3 cycles. Devices which promise to respond within one or two cycles are said to have "fast DEVSEL" or "medium DEVSEL", respectively. (In fact, the time to respond is 2.5 cycles, since PCI devices have to transmit all signals half a cycle early so that they can be retaining3 cycles later.)Note that a device have to latch the address on the first cycle; the initiator is needed to remove the address and command from the bus on the following cycle, even before retaining a DEVSEL# response. The extra time is available only for interpreting the address and command after it is captured. On the fifth cycle of the address phase (or earlier if all other devices have medium DEVSEL or faster), a catch-all "subtractive decoding" is permitted for some address ranges. It is generally used by an ISA bus bridge for addresses within its particular range (16 bits for I/O and 24 bits for memory).

On the sixth cycle, if there has been no response, the initiator can abort the transaction by deserting FRAME#. It is known as master abort termination and it is customary for PCI bus bridges to return all- ones data (0xFFFFFFFF) in this particular case. PCI devices therefore are generally designed to ignore by using the all-ones value in essential status registers, so that such type of error may be easily detected by software.

 


Related Discussions:- Address phase - computer architecture

Design a sample counter, Let's design a synchronous BCD counter. A BCD coun...

Let's design a synchronous BCD counter. A BCD counter follows a sequence of ten states and returns to 0 after count of 9. These counters are also known as decade counters. This typ

Define program counter, Define Program Counter(PC) The Program Counter ...

Define Program Counter(PC) The Program Counter holds the address of the next instruction to be read from memory after the current instruction is implemented.

Register transfer - computer architecture, Register transfer - computer arc...

Register transfer - computer architecture: Register transfer: The output and input gates for register Ri are controlled by the signals Riout and Riin respectively.

Limitation identified in amdahls law, Q. Limitation identified in Amdahls l...

Q. Limitation identified in Amdahls law? There is one main limitation identified in Amdahl's law. As said by Amdahl's law workload or problem size is forever fixed as well as n

Write a small program using floating-point operations, Question: a) Wri...

Question: a) Write a small program using floating-point operations in Reverse Polish Notation to evaluate the following: Volume of Sphere = (4/3)πr 3 Consider that the u

Two methods of copying a information document, There are basically two meth...

There are basically two methods of copying: Photocopying This is a modified development of photography. It is quite expensive and slow and is not often used for routine rep

C token, describe briefly about the c token with suitable example program

describe briefly about the c token with suitable example program

Sosail studies, whitch goods did the new england colonies exportto england ...

whitch goods did the new england colonies exportto england and what did they get in return

Example of the horizon problem, Example of the horizon problem: It is ...

Example of the horizon problem: It is also worth bearing in mind the horizon problem, however a game-playing agent cannot see much far satisfactory into the search space. Now

Explain the meaning of listen socket primitive, Explain the meaning of L...

Explain the meaning of LISTEN socket primitive The listen Primitive: After identifying a protocol port a server should instruct the operating system to place a socket

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd