8237 modes-microprocessor, Assembly Language

Assignment Help:

8237 modes :

Intel 8237 can be set to four different type of style of transfer:

1) Single - One transfer at a time,  it allow processor access to the bus between transfers.

2) Block - Transfer all data, it do not allow processor access to the bus (may cause problems with memory refresh).

3) Demand - it keep transferring as long as target keeps DRQ asserted.

4) Cascade - it allow a slave controller use of the DMAC (used for DRQ4).

 

(A) In addition, the DMA controller can be set to make continuous transfers

o   It known as auto-initialized DMA

o   normally DMA is known as "single-cycle"

 

(B) 8237 is clocked at 1/2 of ISA Bus (0.5 *BLCK)

o   up to 4.166MHz (8.33 Mhz ISA)

o   Maximum transfer rate: 4.166MB/s (16-bit DMA)

o   Maximum Programmed I/O transfer rate: 2.77 MB/s

 

(C) Size of transfer

o   Master can only produce word-sized transfers

o   Slave can produce byte-sized transfers

o   Minimum transfer size: 1 byte

o   Maximum transfer size: 64KB (8-bit),128KB (16-bit)

 


Related Discussions:- 8237 modes-microprocessor

Basic microprocessor architecture and interface, Basic Microprocessor Archi...

Basic Microprocessor Architecture and Interface : Introduction: Intel launches its first 4-bit microprocessor 4004 in the year 1971 and 8-bit microprocessor 8008 in the y

Entering a program-microprocessor, Entering a Program In this section, ...

Entering a Program In this section, we will explain the procedure for entering a small program on IBM PC with DOS operating system. Assume a program of addition of 2 bytes, as

Hashing, what is double hashing

what is double hashing

8279 keyword /display controller-microprocessor, 8279 Keyword /Display Cont...

8279 Keyword /Display Controller : Figure shows the structure of 8279 and its interface to the bus. Addressing is according to the table given below. CS        RD

Using straight line method for depreciation, Request a depreciation of the...

Request a depreciation of the item, year of purchase, cost of item, number of years to be depreciated (estimated life ) and,the method of depreciation . Method of depreciation sh

Conditional branch instruction-microprocessor, Conditional branch Instructi...

Conditional branch Instruction When these type of instructions are executed, they transfer control of execution to the address mention relatively in the instruction, provided t

Hold response sequence-microprocesssor, Hold Response Sequence The HOLD...

Hold Response Sequence The HOLD pin is examined at leading edge of each clock pulse. If it is received active line by the processor before T4 of the earlier cycle/during the T1

Flag register-microprocessor, Flag Register : 8086 has a 16-bit flag r...

Flag Register : 8086 has a 16-bit flag register which is divided into 2 parts, viz. (a)machine control flagsand (b)condition code or status flags. The condition code flag regi

Shl/sal-logical instruction-microprocessor, SHL/SAL : Shift logical/Arithm...

SHL/SAL : Shift logical/Arithmetic Left: These instructions shift the operand byte or word bit by bit to the left and insert 0 in the newly introduced least significant bits. In c

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd