Write verilog structural code for this circuit2

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Reference no: EM133360641

Question: Below schematic represents a given circuit which has two 4-bits inputs IN0 and IN1,1-bit input IN2, and one 5-bits output F.This circuit has to calculate IN0 + IN1 and IN0 - IN1, the output result depends on the values of the overflow bits in both add/sub units.1. Write Verilog structural code for this circuit2. Write Verilog test bench for this circuit, use at least four different set of input stimulus

Reference no: EM133360641

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