Write the vhdl architecture file for the y-output

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Reference no: EM13253485

Write the VHDL architecture file for the Y(5) output only for a 8-to-1 demultiplexer. The inputs are D, the selects S0-S2, and the ouputs Y(0)-Y(7). the select lines are bit_vector types, the data is bit type and the outputs are bit_vector types.

Reference no: EM13253485

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