Write a vhdl module that implements a 4-digit bcd adder

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Reference no: EM131367797

Write a VHDL module that implements a 4-digit BCD adder with accumulator (see block diagram below). If LD = 1, then the contents of BCDacc are replaced with BCDacc + BCDin. Each four-digit BCD signal should be represented by an array of the following type:

Write a procedure that adds two BCD digits and a carry and returns a BCD digit and a carry. Call this procedure concurrently four times in your code.

Reference no: EM131367797

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