Write a test bench for uart that performs a loop-back test

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Write a test bench for the UART that performs a loop-back test. The test bench connects the TxD output of the UART to the RxD input so that any data loaded into TDR will automatically be transmitted from TxD, received into RxD, and loaded into RDR. The test bench should simulate the action of a CPU that writes "01010101" to TDR, reads the status register in a loop until RDRF = ‘1', and then reads from RDR.

Reference no: EM131367450

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