Write a makefile such that the command make compiles

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Reference no: EM132205958

Write a Makefile such that the command $ make compiles the program hello.cpp and produces an executable named hello .

The Makefile should include a target named clean so that the command $ make clean removes the executable file hello .

I was thinking that because there is only one file that gets compiled by a make file, it doesn't need the who line that lists it's dependencies?

So it would besometing like

g++ -o hello hello.c clean: rm *.o hello

Would this be the right train of thought?

Reference no: EM132205958

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