Which configuration then would have higher input impedance

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Reference no: EM13229133

The input impedance of a JFET used in COMMON SOURCE configuration, is defined by two considerations: The JFET itself has a VERY HIGH INPUT IMPEDANCE, because the input is the GATE to SOURCE junction that is REVERSE biased (no conduction means an open circuit i.e. approx. infinite impedance!) But in order to bias the device we have to use resistors around the device, and in the case of the self biased configuration, one single resistor must be connected between the GATE and COMMON, i.e. the SOURCE. That resistor will be typically a lower impedance than infinite, and since it is in parallel with the input impedance of the JFET itself, then it will be the lower of the two, i.e. the external biasing resistor that will define the input impedance of the amplifier. Which configuration then would have the higher input impedance, the self-biased approach, or the voltage divider approach?

Reference no: EM13229133

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