When the jmpc field in the microinstruction is enabled

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Assume that when the JMPC field in the microinstruction is enabled (set), MBR is ORed with NEXT_ADDRESS to determine the address of the next microinstruction to be executed. Are there any circumstances in which it makes sense to have NEXT_ADDRESS be 0x1FF and use JMPC? Briefly explain your answer.

Reference no: EM13164630

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