What will change the logic gate and invert the inputs

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Reference no: EM13225447

draw out a schematic that implements a 3-bit XOR gate, but consisting of only 2-bit NAND gates. Your schematic should have from 8-10 NAND gates, but NO other logic function such as OR, AND, INV gates can be in your final design. If your design has more than 10 NAND gates, it is not simplified enough, if it has less than 8 it's unlikely that it will work. Start with AB'+A'B and draw a simple schematic with AND, NOT, and OR gates. "Push the bubbles" until you have only 5 NAND gates. Pushing the bubble is the visual explanation of De Morgan's Law. Where the "bubble," which is a NOT gate, is pushed through a gate. Pushing a bubble through will change the logic gate and invert the inputs, shown below. Convince yourself that they are equivalent. Hint: Put two bubbles at your OR gate output and push one of them through. Cascading this design with a second XOR design will produce the final design, i.e. the output of the first design will be the input of the second design. You must show any work that you performed to get the results (Boolean algebra, pushing bubbles, cascading design, etc.).

Reference no: EM13225447

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