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A Y-connected load has an impedance of 25+j12 ohms in each phase. It is desired to raise the load power factor to .95 lagging.
(a) What size capacitor should be placed in parallel with each phase impedance if frequence = 60 Hz
(b) Let the line voltage at the load have an amplitude of 500 V rms. How many kVAR (capacitive) are required at the load to obtain a Power Factor of .95 lagging?
Finding the periodicity in N of the discrete time signal x(n) = Cos(3pi*Ts.n + pi/4) and then plotting the discrete signal. From this the condition on the sampling period is determined
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A transconductance amplifier with Ri = 2 kΩ, Gm = 40 mA/V , and Ro = 20kΩ is fed with a voltage source having a source resistance of 2kΩ and is loaded with a 1kΩ resistance. Find the voltage gain realized (from the source internal voltage to the o..
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The global radiation at the solar noon on a summer solstice in Albuquerque, New Mexico (latitude 35° N) is 60mw/cm^2. Assume that (a) 30 % of this irradiance is diffuse radiation and (b) the ground surrounding a PV module is non-reflecting
Compute the power levels of the 2nd, 3rd, and 4th harmonics relative to the fundamental output signal for the Class C amplifier. compute the Fourier coefficients for the harmonics of the clipped sinusoid that results from the partial conduction an..
Calculate capacitor size, An electrical supply company charges its consumers a penalty if their reactive energy consumption (Kvar-hour)exceeds half their true energy consumption (Kilowatt-hour).
A 35-year old female worker receives an x-ray exposure of 5.2 rad (whole-body) while carrying out emergency procedures in a nuclear accident. Discuss the health risks assumed by this worker as a result of the radiation exposure.
A signal x[n] is formed by sampling a signal x(t) = -4sin(200*pi*t) at a sampling rate of 400Hz. Graph x[n] over 10 fundamental periods versus discrete time. Then do the same for the sampling frequencies of 60 and 200Hz.
A 75-kVA, 230-V/115-V, 60-Hz was tested with these results: Open-circuit test: 115 V, 16.3 A, 750 W; Short-circuit test: 9.5 V, 326 A, 1200 W a) Determine the voltage regulation at rated load, 0.8 power factor lagging.
Using D-type flip-flops, design a synchronous Moore finite-state machine that monitors two inputs A and B, and asserts a scalar output if the number of 1s observed on the inputs is a multiple of 4.
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