Reference no: EM13266256
1. What is the vector address of a reset interrupt in the MC9S12C32 microcontroller?
$FFFA
$FF8E
$FFFE
$F000
2. In the MC9S12DG256 microcontroller, the address range 0xFFFC - 0xFFFD in the interrupt vector table is assigned to which of the following?
Clock monitor fail reset
SPI
Watch dog timer
CAN
3. I2C has _____.
a parallel line
a universal serial bus
a serial clock line
no clock line
4. I2C data transfer can be up to _____.
1Khz
1Ghz
3.5Mb/sec
1Mb/sec
5. I2C has _____.
start capabilities
stop capabilities
arbitration capabilities
All of the above
6. Setting the IBCR register to 11000000 in binary _____.
disables the IIC bus
enables interrupts from the IIC bus
sets the clock rate to 4Mhz
disables IIC
7. _____ is a layer in the Windows OS architecture.
Module
Kernel mode
Thread
Fiber
8. _____ is a layer of the UNIX OS architecture.
Fiber
Shell
Device driver
Serial interface
9. _____ frame has 10 bits.
SCI
USB
IP
TCP
10. _____ to concatenate the two 8-bit PWM Channels 3 and 2 to get a 16-bit PWM.
Set CON23 in PWMCTL equal to 1
Set CON23 in PWMCTL equal to 0
Set CON23 in PWMDTY equal to 1
Set CON2 in PWMCTL equal to 1
11. To disable Channel 7 of the PWM of 9S12DG256, the following must be done.
Set PWME7 = 1
Set PWME7 = 0
Set CAE7 = 1
Set CAE7 = 0
12. What is Clock SA when PWMSCLA = 0x01 and Clock A = 4MHz?
5MHz
4MHz
8MHz
2MHz
13. USB utilizes _____.
serial data transfer
parallel data transfer
mixed parallel/serial data transfer
daisy chain to connect a maximum of 10 devices
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