What is the utilization of the data memory

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Reference no: EM131322180

1. Assuming there are no stalls or hazards, what is the utilization of the data memory?

2. Assuming there are no stalls or hazards, what is the utilization of the write-register port of the "Registers" unit?

3. Instead of a single-cycle organization, we can use a multi-cycle organization where each instruction takes multiple cycles but one instruction finishes before another is fetched. In this organization, an instruction only goes through stages it actually needs (e.g., ST only takes 4 cycles because it does not need the WB stage). Compare clock cycle times and execution times with single cycle, multi-cycle, and pipelined organization.

Reference no: EM131322180

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