Reference no: EM13754029
Question 1: Design a 3V Zener Diode voltage regulator for a load varies from 0 to 150mW. The input DC supply will vary from 8 to 18 volts. The design should include the power rating of all components. The minimum on current lzmin of the Zener diode must be considered in the design.
a. Comment on you design
b. Repeat the design with load varies from 0 to 6m W. Comment on the new design.
Question 2: For the following Depletion-type MOSFET voltage divider biased circuit with gos = 30μ5, lDss=12mA and Vex-4V.
a. Determine the bias resistors Rs, R1, and R2 such that the circuit will have mom than 70% of maximum gmo and input impedance Zl > MΩ. Calculate lDQ, VgsQ, and Vds to make sure the circuit is properly biased.
b. Determine input, output impedances, and voltage gain of the circuit, Zl, Zo, Av. Draw the small signal model of the circuit.
d. If the input signal is from -2mV to 2mV, what is the output signal amplitude?
e. What can you do to increase the output signal amplitude by 20%?
![118_Zener Diode voltage regulator.png](https://secure.expertsmind.com/CMSImages/118_Zener%20Diode%20voltage%20regulator.png)
Question 3: For the following JFET source follower circuit with gos = 20μS, lDss = 12mA and Vp = -4v
a. Determine the bias resistors Rs, and RG such that the circuit will be biased at Id = Idss/3 and input impedance Z1,5MΩ. Calculate lac, Vgsc, and Vds to make sure the circuit is properly biased.
b. Determine input, output impedances, and voltage gain of the circuit, Zi, Zo, Av.
c. Draw the small signal model of the circuit.
d. If the input signal is from -20mV to 20mV, what is the output signal amplitude?
e. What can you do to increase the output signal amplitude by 20%?
![995_Zener Diode voltage regulator1.png](https://secure.expertsmind.com/CMSImages/995_Zener%20Diode%20voltage%20regulator1.png)
Question 4: For the following Enhance-type MOSFET teed-back biased circuit with gos = 30μS. K = 0.3 x 103 (A/V2) and VTH = 3V.
a. Determine the bias resistors R0 and Rf such that the circuit will have gm > 2.0 ms and input impedance Zi,> 1 MΩ. Calculate loQ, VgSQ, and Vds to make sure the circuit is properly biased.
b. Determine input, output impedances, and voltage gain of the Circuit. ZI, ZO, Av.
c. Draw the small signal model of the circuit.
d. What can you do if you are asked to increase the voltage gain of the circuit?
![2072_Zener Diode voltage regulator2.png](https://secure.expertsmind.com/CMSImages/2072_Zener%20Diode%20voltage%20regulator2.png)
Question 5: For the following Enhance type MOSFET voltage divider biased circuit with gos = 30μS, K= 0.3 x 10-3 (A/V) and VTH = 3V.
e. Determine the bias resistors Rs, R1, end R2 such that the circuit will hare ga>2.5 mS and input impedance Zl,>5 MΩ. Calculate IDQ, Vasa, and Vds to make sure the circu it is properly biased.
f. Determine input, output impedances, and voltage gain of the circuit, ZI, ZO, AV.
g. Draw the small signal model of the circuit.
h. What can you do if you are asked to increase the voltage gain of the circuit?
![1116_Zener Diode voltage regulator3.png](https://secure.expertsmind.com/CMSImages/1116_Zener%20Diode%20voltage%20regulator3.png)
Question 6: For the following Depletion-type INOSFET self-biased circuit with gos = 30μS. IDss = 12mA and VP = -4V.
a. Determine the bias resistors Rs RG and RD such that the circuit will have voltage gain more than 10 and input impedance ZI = 1MΩ. Calculate IoQ, VgsQ, and Vds to make sure the circuit Is properly biased.
b. Determine input, output impedances, and voltage gain of the circuit, ZI, ZO, AV.
c. Draw the small signal model of the circuit.
d. What can you do if you are asked to increase the voltage gain to 12?
![2068_Zener Diode voltage regulator4.png](https://secure.expertsmind.com/CMSImages/2068_Zener%20Diode%20voltage%20regulator4.png)