Reference no: EM133028956
Question 1) Find the small-signal gain (Av=vo/vi) of the following circuit. All transistors are biased to be in the saturation region and carry 20 μA current. (W/L)1 = 18/2, (W/L)2 = 6/2, (W/L)3=18/2 and (W/L)4=2/2. Assume channel length modulation is negligible, i.e., ro1=ro2=ro3=ro4=∞
Question 2) What is the minimum and maximum possible voltage for Vcm to make sure all transistors are in the saturation region? Vso.sat for all PMOS is 0.5 V. VDss„satfor all NMOS is 0.25 V. VTHn=0.8 V and VTHp=0.9 V.
Question 3) Consider the following amplifier circuit. M1 and M2 are biased to flow current of 20 μA. (W/L)1 = 10/1 and (W/L)2=30/1. Cgs1=10 fF, Cgd1=1 fF, Csg2=30 fF, and Cdg2=3 fF. Rs=100 kΩ. Use process parameters in the table below. Assume all other parasitic capacitances are negligible. Ignore the body effects
a) Find out the low-frequency small-signal gain.
b) When CL=0 F (or no CL), what is the 3- dB bandwidth of the amplifier?
Question 4) Consider the following amplifier circuit. (W/L)pmos=30/1 and (W/L)nmos=10/1. C1 is very large. RL=50 Ω. Process parameters are given in the following table. Bias voltages are provided to make sure all transistors carry 20 pA current. Ignore the body effects.
a) What is the small signal gain of this amplifier?
b) VDD is set to 5 V. Is this high enough to make sure all transistors are in the saturation region? If not, how high the VDD should be?
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