What is the main drawback of reducing the supply voltage

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Reference no: EM13251741

a) What is the main drawback of reducing the supply voltage of digital electronics?

b) a built-in battery drive system is based on microcontroller STM32F100RB and has supply voltage 3.0 volts.

The system has total capacitance CT = 1.0 muF (10 ^ 6 Farad) and average frequency in use at 10kHz.
The transformation of battery power to power inn the microcontroller and additional components occurs with virtually no losses.

Find out the average power PD emitted in the system during operation and the average current draw IB from the battery.

Find out what battery capacity you must have in the system so that the system could be used in at least 100 hours between charges.

It is Considered reducing the supply voltage by 2.0 V, which is the minimum voltage for the microcontroller. What is the requirement for battery life now?

c) An 8-bit microprocessor has a data bus which is connected to eight peripheral modules. Each data line has a capacitance therian to ground (GND) is Cd = 6 p(ico) F(arad). The capacitance of each of the inputs of a peripheral module is Ci = 8 p(ico) F(arad).
The average switching frequency of the bus is f = 2 MHz and supply tension is Vcc = 3.3 volts.

Find out what the overall effect PD which is given by the data bus and associated peripheral modules.

Reference no: EM13251741

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