What is the gate delay of the new design

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The 74LS gate in Fig. 9.62 is redesigned to operate at a power of 5 mW.

(a) What is the gate delay of the new design? Assume a constant power-delay product.

(b) What power is required to achieve a delay of 0.3 ns?

1398_9fe5bd44-a6e0-4e77-aa45-535ebf346eb7.png

Reference no: EM131267119

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