What is the expected propagation delay of the logic gate

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A logic family has a power-delay product of 100 fJ. If a logic gate consumes a power of 100 W, what is the expected propagation delay of the logic gate? The graph in Fig. P6.135 gives the results of a SPICE simulation of an inverter.

(a) What are the rise and fall times for vI and vO?

(b) What are the values of τPHL and τPLH? (c) What is the average propagation delay for this gate?

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Reference no: EM131261712

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