What are the criteria by which address decoders are judged

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Question: 1. What are the criteria by which address decoders are judged? That is, what factors does an engineer take into account when selecting a particular address decoder for use in a microprocessor system?

2. What does primary address range mean when it is applied to a system using partial address decoding?

3. Design an address decoder using a PROM to implement the following memory map:

a. 4 Mbytes of ROM at address $00 0000 using 1M x 8-bit chips

b. 8 Mbytes of RAM at address $80 0000 using 4M x 4-bit chips

c. 1 Mbyte of RAM at address $60 0000 using 5 I2K 8-bit chips.

Reference no: EM131531263

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