Use the rtl design process to design a system

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Use the RTL design process to design a system that outputs the average of the most recent two data input samples. The system has an 8 ­bit unsigned data input I and an 8 ­bit unsigned output. The data input is sampled when a single bit input S changes from 0 to 1. Choose the internal bit widths that prevent overflow. 

Reference no: EM13744089

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